이 특허를 인용한 특허 (66)

1. Ootsuka, Fumio, 3D stacked multilayer semiconductor memory using doped select transistor channel.

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2. Oosterlaken, Theodorus; de Ridder, Chris; Jdira, Lucian, Apparatus and method for manufacturing a semiconductor device.

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3. Brian Doyle ; Quat T. Vu ; Leopold Yau, Capping layer in interconnect system and method for bonding the capping layer onto the interconnect system.

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4. Doyle Brian ; Yu Quat T. ; Yau Leopoldo D., Capping layer in interconnect system and method for bonding the capping layer onto the interconnect system.

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5. den Hartog Besselink, Edwin; Garssen, Adriaan; Dirkmaat, Marco, Cassette holder assembly for a substrate cassette and holding member for use in such assembly.

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6. Tuttle,Mark E., Communication devices, remote intelligent communication devices, electronic communication devices, methods of forming remote intelligent communication devices and methods of forming a radio frequency.

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7. Pluymers Brian Alan ; Teti Richard Joseph, Compliant RF coaxial interconnect.

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8. Zaitsu, Masaru; Fukazawa, Atsuki; Fukuda, Hideaki, Continuous process incorporating atomic layer etching.

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9. Gardner Donald S., Decoupling capacitor in an integrated circuit.

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10. Raisanen, Petri; Shero, Eric; Haukka, Suvi; Milligan, Robert Brennan; Givens, Michael Eugene, Deposition of metal borides.

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11. Zhu, Chiyu; Shrestha, Kiran; Haukka, Suvi, Deposition of metal borides.

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12. Tuttle, Mark E., Electronic communication devices, methods of forming electrical communication devices, and communications methods.

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13. Brian Alan Pluymers ; Doreen Marie Nixon, Fabrication of a circuit module with a coaxial transmission line.

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14. Pluymers Brian Alan ; Nixon Doreen Marie, Fabrication of a circuit module with a coaxial transmission line.

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15. Milligan, Robert Brennan, Formation of boron-doped titanium metal films with high work function.

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16. Hawkins, Mark; Halleck, Bradley Leonard; Kirschenheiter, Tom; Hossa, Benjamin; Pottebaum, Clay; Miskys, Claudio, Gas distribution system, reactor including the system, and methods of using the same.

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17. Rolfson J. Brett, Integrated circuit and method for forming and integrated circuit.

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18. Rolfson J. Brett, Integrated circuit, and method for forming an integrated circuit.

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19. Rolfson J. Brett, Interlocking conductive plug for use with an integrated circuit.

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20. Pore, Viljami, Method and apparatus for filling a gap.

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21. Pore, Viljami; Knaepen, Werner; Jongbloed, Bert; Pierreux, Dieter; Van Aerde, Steven R. A.; Haukka, Suvi; Fukuzawa, Atsuki; Fukuda, Hideaki, Method and apparatus for filling a gap.

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22. Pore, Viljami; Knaepen, Werner; Jongbloed, Bert; Pierreux, Dieter; Van Der Star, Gido; Suzuki, Toshiya, Method and apparatus for filling a gap.

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23. Tolle, John; Hill, Eric; Winkler, Jereld Lee, Method and system for in situ formation of gas-phase compounds.

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24. Jung, Sung-Hoon; Raisanen, Petri; Liu, Eric Jen Cheng; Schmotzer, Mike, Method and system to reduce outgassing in a reaction chamber.

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25. Winkler, Jereld Lee, Method and systems for in-situ formation of intermediate reactive species.

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26. Kang, DongSeok, Method for depositing thin film.

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27. Winkler, Jereld Lee, Method for forming conformal carbon films, structures conformal carbon film, and system of forming same.

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28. Ishikawa, Dai; Fukazawa, Atsuki, Method for forming silicon nitride film selectively on sidewalls or flat surfaces of trenches.

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29. Kato, Richika; Nakano, Ryu, Method for protecting layer by forming hydrocarbon-based extremely thin film.

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30. Zaitsu, Masaru; Kobayashi, Nobuyoshi; Kobayashi, Akiko; Hori, Masaru; Kondo, Hiroki; Tsutsumi, Takayoshi, Method of cyclic dry etching using etchant film.

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31. Zahorik, Russell C., Method of fabricating a conductive path in a semiconductor device.

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32. Zahorik,Russell C., Method of fabricating a conductive path in a semiconductor device.

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33. Zahorik, Russell C., Method of fabricating a small electrode for chalcogenide memory cells.

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34. Zahorik, Russell C., Method of fabricating phase change memory cell.

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35. Lee Se-hyeong,KRX ; Shin Ji-chul,KRX, Method of forming a contact hole in a semiconductor device.

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36. Gardner Donald S., Method of forming a decoupling capacitor.

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37. Knaepen, Werner; Maes, Jan Willem; Jongbloed, Bert; Kachel, Krzysztof Kamil; Pierreux, Dieter; De Roest, David Kurt, Method of forming a structure on a substrate.

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38. Lee, Choong Man; Yoo, Yong Min; Kim, Young Jae; Chun, Seung Ju; Kim, Sun Ja, Method of forming metal interconnection and method of fabricating semiconductor apparatus using the method.

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39. Nien-Yu Tsai TW; Hong-Long Chang TW; Chun-Wei Chen TW; Ming-Li Kung TW, Method of forming tungsten interconnect and vias without tungsten loss during wet stripping of photoresist polymer.

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40. Chun, Seung Ju; Yoo, Yong Min; Choi, Jong Wan; Kim, Young Jae; Kim, Sun Ja; Lim, Wan Gyu; Min, Yoon Ki; Lee, Hae Jin; Yoo, Tae Hee, Method of processing a substrate and a device manufactured by using the method.

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41. Kohen, David; Profijt, Harald Benjamin, Methods for depositing a doped germanium tin semiconductor and related semiconductor device structures.

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42. Raisanen, Petri; Givens, Michael Eugene, Methods for forming a transition metal nitride film on a substrate by atomic layer deposition and related semiconductor device structures.

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43. Margetis, Joe; Tolle, John, Methods of forming highly p-type doped germanium tin films and structures and devices including the films.

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44. Pluymers Brian Alan ; Nixon Doreen Marie ; Teti Richard Joseph ; Hayes Robert Edward, Multi-circuit RF connections using molded and compliant RF coaxial interconnects.

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45. Zhu, Chiyu; Asikainen, Timo; Milligan, Robert Brennan, NbMC layers.

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46. Zahorik, Russell C., Phase change memory cell and devices containing same.

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47. Arrington, Edward L.; Bhatt, Anilkumar C.; Fey, Edmond O.; Knadle, Kevin T.; Konrad, John J.; Kotylo, Joseph A.; McKeveny, Jeffrey; Rios, Jose A.; Sarkhel, Amit K.; Seman, Andrew M.; Wells, Timothy L, Printed circuit board with mixed metallurgy pads and method of fabrication.

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48. Margetis, Joe; Tolle, John; Bartlett, Gregory; Bhargava, Nupur, Process for forming a film on a substrate using multi-port injection assemblies.

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49. Usami Tatsuya,JPX, Process for manufacturing a semiconductor device.

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50. Alokozai, Fred; Milligan, Robert Brennan, Process gas management for an inductively-coupled plasma deposition reactor.

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51. Alokozai, Fred; Milligan, Robert Brennan, Process gas management for an inductively-coupled plasma deposition reactor.

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52. Tuttle, John R., Radio frequency identification device and method.

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53. Tuttle, John R., Radio frequency identification device and method.

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54. Zhu, Chiyu, Selective film deposition method to form air gaps.

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55. Kim, Young Jae; Choi, Seung Woo; Yoo, Yong Min, Semiconductor device and manufacturing method thereof.

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56. Shen, Ming-Tung, Semiconductor device having an electrical contact and a dielectric lining in a contact region.

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57. Zahorik, Russell C., Small electrode for phase change memories.

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58. Zahorik,Russell C., Small electrode for phase change memories.

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59. Xie, Qi; de Roest, David; Woodruff, Jacob; Givens, Michael Eugene; Maes, Jan Willem; Blanquart, Timothee, Source/drain performance through conformal solid state doping.

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60. Jeong, Sang Jin; Han, Jeung Hoon; Choi, Young Seok; Park, Ju Hyuk, Susceptor for semiconductor substrate processing apparatus.

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61. Tang, Fu; Givens, Michael Eugene; Xie, Qi; Raisanen, Petri, System and method for gas-phase sulfur passivation of a semiconductor surface.

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62. Tuttle, John R., System and method to track articles at a point of origin and at a point of destination using RFID.

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63. Lawson, Keith R.; Givens, Michael E., Systems and methods for dynamic semiconductor process scheduling.

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64. Holmes,Benjamin J.; Chambers,Randall P., Tear resistant flexible substrate.

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65. Shugrue, John Kevin, Variable conductance gas distribution apparatus and method.

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66. Schmotzer, Michael; Whaley, Shawn, Variable gap hard stop design.

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