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Advanced signal driving buffer with directional input transition detection 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H03K-017/16
출원번호 US-0092350 (1993-07-15)
발명자 / 주소
  • Wong Myron W. (San Jose CA)
출원인 / 주소
  • Altera Corporation (San Jose CA 02)
인용정보 피인용 횟수 : 66  인용 특허 : 0

초록 ▼

A set of signal buffering circuits for driving heavily loaded signal lines. The buffer circuits detect a signal transition before the signal reaches logical threshold levels, and help drive the signal in the detected transition direction. The early transition detection and drive help reduce signal p

대표청구항 ▼

A signal buffering circuit for driving a signal line, comprising: a driver stage including a pull-up transistor and a pull-down transistor having a common output terminal coupled to the signal line; a rising-edge detection circuit coupled to said pull-up transistor and the signal line, for detecting

이 특허를 인용한 특허 (66)

  1. Pitkethly, Scott; Masleid, Robert Paul, Advanced repeater utilizing signal distribution delay.
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  10. Patel, Rakesh H.; Turner, John E.; Lam, John D.; Wong, Wilson, Circuitry for a low internal voltage.
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  11. Patel Rakesh H. ; Turner John E. ; Lam John D. ; Wong Wilson, Circuitry for a low internal voltage integrated circuit.
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  12. Masleid, Robert Paul; Kowalczyk, Andre, Circuits and methods for detecting and assisting wire transitions.
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  13. Masleid,Robert Paul; Kowalczyk,Andre, Circuits and methods for detecting and assisting wire transitions.
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  14. Masleid,Robert Paul; Kowalczyk,Andre, Circuits and methods for detecting and assisting wire transitions.
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  15. Masleid, Robert, Circuits, systems and methods relating to a dynamic dual domino ring oscillator.
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  16. Masleid,Robert P., Circuits, systems and methods relating to dynamic ring oscillators.
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  17. Masleid, Robert Paul, Column select multiplexer circuit for a domino random access memory array.
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  18. Masleid, Robert Paul, Configurable delay chain with stacked inverter delay elements.
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  19. Masleid,Robert Paul, Configurable delay chain with stacked inverter delay elements.
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  22. Masleid, Robert P.; Pitkethly, Scott, Cross point switch.
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  25. Ngai, Tony; Shumarayev, Sergey; Huang, Wei-Jen, Driver circuitry for programmable logic devices.
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  26. Tony Ngai ; Sergey Shumarayev ; Wei-Jen Huang, Driver circuitry for programmable logic devices.
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  27. Masleid, Robert P, Dynamic ring oscillators.
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  28. Yong-Ki Kim KR, Input buffer having dual paths.
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  29. Wang Ming-Shiang,TWX ; Jen Tean-Sen,TWX ; Chen C. B.,TWX ; Liang Shih-Hsun,TWX ; Wang Shiou-Yu,TWX, Input buffer means for high voltage operation.
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  30. Turner John, Integrated circuit with both clamp protection and high impedance protection from input overshoot.
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  31. John E. Turner ; Rakesh H. Patel, Interface for low-voltage semiconductor devices.
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  32. John E. Turner ; Rakesh H. Patel, Interface for low-voltage semiconductor devices.
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  33. Turner John E. ; Patel Rakesh H., Interface for low-voltage semiconductor devices.
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  34. Masleid, Robert P, Inverting zipper repeater circuit.
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  35. Masleid, Robert P., Inverting zipper repeater circuit.
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  36. Masleid, Robert Paul, Inverting zipper repeater circuit.
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  37. Masleid, Robert, Leakage efficient anti-glitch filter.
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  38. Masleid,Robert Paul, Leakage efficient anti-glitch filter with variable delay stages.
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  39. Lin Shen, Low power low noise circuit design using half V.sub.dd.
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  40. Vinh James ; Patwa Nital P., Method and apparatus for high speed on-chip signal propagation.
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  41. Kwon Jung Tae (Kyoungki-do KRX), Mode adaptive data output buffer for semiconductor memory device.
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  42. Douse David E. ; Lewis Scott C. ; Maffitt Thomas M., Off chip driver (OCD) with variable drive capability for noise control.
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  43. Patel Rakesh H. ; Turner John E. ; Wong Wilson, Overvoltage-tolerant interface for integrated circuits.
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  44. Patel, Rakesh H.; Turner, John E.; Wong, Wilson, Overvoltage-tolerant interface for integrated circuits.
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  45. Rakesh H. Patel ; John E. Turner ; Wilson Wong, Overvoltage-tolerant interface for integrated circuits.
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  46. Patel Rakesh H. ; Turner John E. ; Wong Wilson, Overvoltage-tolerant interface for intergrated circuits.
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  47. Masleid, Robert Paul, Power efficient multiplexer.
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  48. Masleid, Robert Paul, Power efficient multiplexer.
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  52. Patel, Rakesh H.; Turner, John E.; Lam, John D.; Wong, Wilson, Programmable logic with lower internal voltage circuitry.
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  53. Cahill Joseph James, Receiver assisted net driver circuit.
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  54. Sivero,Stefano; Frulio,Massimiliano, Regenerative clock repeater.
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  55. Masleid, Robert Paul; Dholabhai, Vatsal; Klingner, Christian, Repeater circuit having different operating and reset voltage ranges, and methods thereof.
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  57. Masleid, Robert Paul; Dholabhai, Vatsal, Repeater circuit with high performance repeater mode and normal repeater mode, wherein high performance repeater mode has fast reset capability.
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