이 특허를 인용한 특허 (133)

1. Eddy, Colin; Mohan, Viswanath, Address translation cache that supports simultaneous invalidation of common context entries.

   상세보기
2. Rodgers,Dion; Boggs,Darrell; Merchant,Amit; Kota,Rajesh; Hsu,Rachel, Alteration of functional unit partitioning scheme in multithreaded processor based upon thread statuses.

   상세보기
3. Borkenhagen John Michael ; Flynn William Thomas ; Wottreng Andrew Henry, Altering thread priorities in a multithreaded processor.

   상세보기
4. Nation George Wayne ; Newshutz Robert N. ; Willis John Christopher, Apparatus and method for retrofitting multi-threaded operations on a computer by partitioning and overlapping registers.

   상세보기
5. Borkenhagen John Michael ; Eickemeyer Richard James ; Flynn William Thomas ; Kunkel Steven R. ; Levenstein Sheldon Bernard ; Wottreng Andrew Henry, Apparatus and method to guarantee forward progress in execution of threads in a multithreaded processor.

   상세보기
6. Borkenhagen John M. ; Eickemeyer Richard J. ; Levenstein Sheldon B. ; Wottreng Andrew H. ; Averill Duane A. ; Brookhouser James I., Background completion of instruction and associated fetch request in a multithread processor.

   상세보기
7. Robbins Jeffrey C. ; Bradlee David G. ; Paterson Timothy L., Call template builder and method.

   상세보기
8. Carey James E., Computing system for implementing a shared cache.

   상세보기
9. Carey, James E., Computing system for implementing a shared cache.

   상세보기
10. Satou, Takeshi, Data processing system and control method.

    상세보기
11. Shimogori,Shintaro; Kamano,Shoichi; Kitajima,Toshiaki, Data processing system, data processing apparatus and control method for a data processing apparatus.

    상세보기
12. Watanabe Yoshiki,JPX ; Tanaka Kei,JPX ; Hayata Hiroshi,JPX, Database management system.

    상세보기
13. Faanes,Gregory J.; Scott,Steven L.; Lundberg,Eric P.; Moore, Jr.,William T.; Johnson,Timothy J., Decoupled scalar/vector computer architecture system and method.

    상세보기
14. Scott, Steven L.; Faanes, Gregory J., Decoupling of write address from its associated write data in a store to a shared memory in a multiprocessor system.

    상세보기
15. Robinson Jeffrey I. (New Fairfield CT), Distributed processing systems having a host processor and at least two object oriented processors which communicate dir.

    상세보기
16. Robinson Jeffrey I., Distributed processing systems having self-advertising cells.

    상세보기
17. Robinson Jeffrey I., Distributed processing systems including processing zones which subscribe and unsubscribe to mailing lists.

    상세보기
18. Jeffrey I. Robinson, Distributed processing systems incorporating a plurality of cells which process information in response to single events.

    상세보기
19. Robinson Jeffrey I., Distributed processing systems incorporating a plurality of cells which process information in response to single events.

    상세보기
20. Robinson Jeffrey I., Distributed processing systems incorporating nodes having processing cells which execute scripts causing a message to be sent internodally.

    상세보기
21. Robinson Jeffrey I., Distributed processing systems incorporating processing zones which communicate according to both streaming and event-reaction protocols.

    상세보기
22. Parks, Terry; Eddy, Colin; Mohan, Viswanath; Bunda, John D., Efficient address translation caching in a processor that supports a large number of different address spaces.

    상세보기
23. Robinson Jeffrey I., Event-reaction communication protocol in an object oriented processor array.

    상세보기
24. Flynn William Thomas, Facilities for detailed software performance analysis in a multithreaded processor.

    상세보기
25. Lo, Mankit, Hardware access counters and event generation for coordinating multithreaded processing.

    상세보기
26. Benayoun, Alain; Le Pennec, Jean-Francois; Michel, Patrick; Pin, Claude, Hardware device for processing the tasks of an algorithm in parallel.

    상세보기
27. Benayoun, Alain; Le Pennec, Jean-Francois; Michel, Patrick; Pin, Claude, Hardware device for processing the tasks of an algorithm in parallel.

    상세보기
28. Benayoun, Alain; Le Pennec, Jean-Francois; Michel, Patrick; Pin, Claude, Hardware device for processing the tasks of an algorithm in parallel.

    상세보기
29. Benayoun,Alain; Le Pennec,Jean Francois; Michel,Patrick; Pin,Claude, Hardware device for processing the tasks of an algorithm in parallel.

    상세보기
30. Benayoun,Alain; Pennec,Jean Francois Le; Michel,Patrick; Pin,Claude, Hardware device for processing the tasks of an algorithm in parallel.

    상세보기
31. McCrory, Duane J., Heterogeneous symmetric multi-processing system.

    상세보기
32. Aloni, Eli; Ayalon, Gilad; David, Oren, High speed multi-threaded reduced instruction set computer (RISC) processor with hardware-implemented thread scheduler.

    상세보기
33. Kohn,James R., Indirectly addressed vector load-operate-store method and apparatus.

    상세보기
34. Worrell Frank, Interface for a modularized computational unit to a CPU.

    상세보기
35. Ohsawa, Taku; Matsushita, Satoshi, Interprocessor register succession method and device therefor.

    상세보기
36. Shirley, Timothy C., KVM switch including a terminal emulator.

    상세보기
37. Shirley, Timothy C., KVM switch including a terminal emulator.

    상세보기
38. Shirley,Timothy C., KVM switch including a terminal emulator.

    상세보기
39. Lee, Chan W.; Hinton, Glenn; Krick, Robert, LRU cache replacement for a partitioned set associative cache.

    상세보기
40. Scott, Steven L., Latency tolerant distributed shared memory multiprocessor computer.

    상세보기
41. Harper, David; Smith, Burton, Low-level conditional synchronization support.

    상세보기
42. Cook,Thomas E; Govett,Ian R; Kim,Suhwan; Kosonocky,Stephen V.; Sandon,Peter A., Machine code builder derived power consumption reduction.

    상세보기
43. McCarty, Christopher J.; Johnson, Stephen B., Message index descriptor.

    상세보기
44. Cohen, Earl T.; Steiss, Donald; Eatherton, William; Williams, Jr., John; Fingerhut, John A., Method and apparatus for communicating over a resource interconnect.

    상세보기
45. Averill Duane Arlyn ; Borkenhagen John Michael ; Steenburgh James Anthony ; Woodward Sandra S., Method and apparatus for communicating translation command information in a multithreaded environment.

    상세보기
46. Sager, David J., Method and apparatus for controlling the processing priority between multiple threads in a multithreaded processor.

    상세보기
47. Sager, David J., Method and apparatus for controlling the processing priority between multiple threads in a multithreaded processor.

    상세보기
48. Pautsch, Gregory W.; Pautsch, Adam, Method and apparatus for cooling electronic components.

    상세보기
49. Kreulen Jeffrey Thomas ; Mandyam Sriram Srinivasan ; O'Krafka Brian Walter ; Salamian Shahram ; Raghavan Ramanathan, Method and apparatus for creating a multiprocessor verification environment.

    상세보기
50. Dion Rodgers ; Bret Toll ; Aimee Wood, Method and apparatus for disabling a clock signal within a multithreaded processor.

    상세보기
51. Rudd, Kevin W.; Walterscheidt, Udo, Method and apparatus for ensuring fairness and forward progress when executing multiple threads of execution.

    상세보기
52. Rodgers, Dion; Boggs, Darrell; Merchant, Amit; Kota, Rajesh; Hsu, Rachel, Method and apparatus for entering and exiting multiple threads within a multithreaded processor.

    상세보기
53. Wolczko Mario I. ; Ungar David M., Method and apparatus for improving compiler performance during subsequent compilations of a source program.

    상세보기
54. Kohn, James R., Method and apparatus for indirectly addressed vector load-add-store across multi-processors.

    상세보기
55. Kohn,James R., Method and apparatus for indirectly addressed vector load-add-store across multi-processors.

    상세보기
56. Boggs,Darrell D.; Weiss,Shlomit, Method and apparatus for managing resources in a multithreaded processor.

    상세보기
57. Bender,Ernest S.; Yee,Chun Kwan K., Method and apparatus for managing thread execution in a multithread application.

    상세보기
58. Paul A. Clarke ; Brian Horton, Method and apparatus for parallelizing a graphics pipeline.

    상세보기
59. Rodgers,Dion; Boggs,Darrell; Merchant,Amit; Kota,Rajesh; Hsu,Rachel; Tiruvallur,Keshavan, Method and apparatus for processing an event occurrence for a least one thread within a multithreaded processor.

    상세보기
60. Dion Rodgers ; Darrell Boggs ; Amit Merchant ; Rajesh Kota ; Rachel Hsu ; Keshavan Tiruvallur, Method and apparatus for processing an event occurrence within a multithreaded processor.

    상세보기
61. Rodgers,Dion; Boggs,Darrell; Merchant,Amit; Kota,Rajesh; Hsu,Rachel; Tiruvallur,Keshavan, Method and apparatus for processing an event occurrence within a multithreaded processor.

    상세보기
62. Smith, Lawrence O.; Rodgers, S. Dion, Method and apparatus for processing events in a multithreaded processor.

    상세보기
63. Borkenhagen, John Michael; Eickemeyer, Richard James; Flynn, William Thomas; Wottreng, Andrew Henry, Method and apparatus for selecting thread switch events in a multithreaded processor.

    상세보기
64. Kalafatis, Stavros; Kyker, Alan B.; Fisch, Robert D., Method and apparatus for thread switching within a multithreaded processor.

    상세보기
65. Borkenhagen John Michael ; Eickemeyer Richard James ; Flynn William Thomas ; Wottreng Andrew Henry, Method and apparatus to force a thread switch in a multithreaded processor.

    상세보기
66. Kranich, Uwe; Christie, David S., Method and mechanism for speculatively executing threads of instructions.

    상세보기
67. Nguyen Khoa ; Sarkar Vivek, Method and system for generating compact code for the loop unrolling transformation.

    상세보기
68. Waqar Sadiq, Method and system for load balancing in a distributed object system.

    상세보기
69. Alexander, III, William Preston; Kuiper, Kean G; Richardson, Christopher Michael, Method and system for maintaining consistency during multi-threaded processing of LDIF data.

    상세보기
70. Perks, Michael A., Method and system for managing semaphores in an object-oriented multi-tasking computer system.

    상세보기
71. Hanif Mohammad ; Yanagihara Kazuhisa, Method and system for maximizing the use of threads in a file server for processing network requests.

    상세보기
72. Kalafatis, Stavros; Kyker, Alan B.; Fisch, Robert D., Method and system to insert a flow marker into an instruction stream to indicate a thread switching operation within a multithreaded processor.

    상세보기
73. Kalafatis, Stavros; Kyker, Alan B.; Fisch, Robert D., Method and system to perform a thread switching operation within a multithreaded processor based on detection of a branch instruction.

    상세보기
74. Kalafatis, Stavros; Kyker, Alan B.; Fisch, Robert D., Method and system to perform a thread switching operation within a multithreaded processor based on detection of a flow marker within an instruction information.

    상세보기
75. Kalafatis, Stavros; Kyker, Alan B.; Fisch, Robert D., Method and system to perform a thread switching operation within a multithreaded processor based on detection of a stall condition.

    상세보기
76. Kalafatis, Stavros; Kyker, Alan B.; Fisch, Robert D., Method and system to perform a thread switching operation within a multithreaded processor based on detection of the absence of a flow of instruction information for a thread.

    상세보기
77. Kalafatis, Stavros; Kyker, Alan B.; Fisch, Robert D., Method and system to perform a thread switching operation within a multithreaded processor based on dispatch of a quantity of instruction information for a full instruction.

    상세보기
78. Luis F. Stevens, Method, system and computer program product for managing memory in a non-uniform memory access system.

    상세보기
79. Stevens Luis F., Method, system and computer program product for managing memory in a non-uniform memory access system.

    상세보기
80. Stevens Luis F., Method, system and computer program product for managing memory in a non-uniform memory access system.

    상세보기
81. Richardson John L., Method, system and computer program product for profiling thread virtual memory accesses.

    상세보기
82. Richardson John L. ; Stevens Luis, Method, system, and computer program product for allocating physical memory in a distributed shared memory network.

    상세보기
83. Stevens Luis F. ; Subramanya Bhanu, Method, system, and computer program product for page replication in a non-uniform memory access system.

    상세보기
84. Robinson Jeffrey I., Methods and apparatus for distributed processing and rapid ASIC development.

    상세보기
85. Jeffrey I. Robinson, Methods and apparatus for intercepting dual-tone multi-frequency (DTMF) signals and for redialing the intercepted signals with additional DTMF signals.

    상세보기
86. Schoen Hans-Ulrich,DEX ; Siegwart Bernd,DEX ; Petersen Volker,DEX ; Matz Christine,DEX, Multi-processor system.

    상세보기
87. Aipperspach Anthony Gus ; Christensen Todd Alan ; Patel Binta Minesh ; Van Phan Nghia ; Rohn Michael James ; Storino Salvatore Nicholas ; Talik Bryan Joe ; Uhlmann Gregory John, Multi-threaded cell for a memory.

    상세보기
88. Eatherton, Will; Cohen, Earl T.; Fingerhut, John Andrew; Steiss, Donald E.; Williams, John, Multi-threaded packet processing architecture with global packet memory, packet recirculation, and coprocessor.

    상세보기
89. Ikeda Masayuki,JPX ; Nagasawa Shigeru,JPX ; Ueno Haruhiko,JPX ; Shinjo Naoki,JPX ; Utsumi Teruo,JPX ; Kobayakawa Kazushige,JPX ; Sueyasu Naoki,JPX ; Ishizaka Kenichi,JPX ; Dewa Masami,JPX ; Takamura , Multiprocessor system and parallel processing method for processing data transferred between processors.

    상세보기
90. Scott,Steven L.; Faanes,Gregory J.; Stephenson,Brick; Moore, Jr.,William T.; Kohn,James R., Multistream processing memory-and barrier-synchronization method and apparatus.

    상세보기
91. Gosior,Jason; Broughton,Colin; Jacobsen,Phillip; Sobota,John, Multithread embedded processor with input/output capability.

    상세보기
92. Eickemeyer Richard James ; Kossman Harold F., Multithreaded processor incorporating a thread latch register for interrupt service new pending threads.

    상세보기
93. Thomas, Christopher L.; Anderson, Robin L.; Gilgen, Robert L.; DesMarais, Mark; Pinkston, William J.; Collins, Jamie F.; Schulz, Stephan, Network based KVM switching system.

    상세보기
94. Scott,Steven L.; Dickson,Chris; Reinhardt,Steve, Node translation and protection in a clustered multiprocessor system.

    상세보기
95. Goto Masaru,JPX, One-chip microcomputer including RISC processor and one or more coprocessors having control registers mapped as internal registers for the RISC processor.

    상세보기
96. Robinson Jeffrey I., PBX system having line cards and phone cards which exhibit reciprocal relationships.

    상세보기
97. Shirley,Timothy C., Packet-based switch for controlling target computers.

    상세보기
98. Lakhotia, Arun; Karim, Md. Enamul; Walenstein, Andrew, Phylogeny generation.

    상세보기
99. Mallick Soummya ; McDonald Robert G. ; Swarthout Edward L., Processor and method for dynamically inserting auxiliary instructions within an instruction stream during execution.

    상세보기
100. Matthews, Ken, Rack interface pod with intelligent platform control.

     상세보기
101. Matthews, Ken, Rack interface pod with intelligent platform control.

     상세보기
102. Scott, Steven L.; Faanes, Gregory J.; Stephenson, Brick; Moore, Jr., William T.; Kohn, James R., Relaxed memory consistency model.

     상세보기
103. Scott, Steven L.; Dickson, Chris; Fromm, Eric C.; Anderson, Michael L., Remote address translation in a multiprocessor system.

     상세보기
104. Chen, Dong; Eisley, Noel A.; Heidelberger, Philip; Kahle, James A.; Petrini, Fabrizio; Senger, Robert M.; Steinmacher-Burow, Burkhard; Sugawara, Yutaka, Remote processing and memory utilization.

     상세보기
105. Chen, Dong; Eisley, Noel A.; Heidelberger, Philip; Kahle, James A.; Petrini, Fabrizio; Senger, Robert M.; Steinmacher-Burow, Burkhard; Sugawara, Yutaka, Remote processing and memory utilization.

     상세보기
106. Scott, Steven L., Remote translation mechanism for a multi-node system.

     상세보기
107. Sheets, Kitrick; Hastings, Andrew B., Remote translation mechanism for a multinode system.

     상세보기
108. Klausler, Peter M., Scheduling synchronization of programs running as streams on multiple processors.

     상세보기
109. Sheets,Kitrick; Williams,Josh; Gettler,Jonathan; Piatz,Steve; Hastings,Andrew B.; Hill,Peter; Bravatto,James G.; Kohn,James R.; Titus,Greg, Scheduling synchronization of programs running as streams on multiple processors.

     상세보기
110. Gaur, Santosh P.; Hall, William Eric, Secure data transfer over a network.

     상세보기
111. Dorn Karlheinz,DEX ; Becker Detlef,DEX ; Quehl Dietrich,DEX, Service and event synchronous/asynchronous manager.

     상세보기
112. Sheets, Kitrick, Sharing memory within an application using scalable hardware resources.

     상세보기
113. Eddy, Colin, Simultaneous invalidation of all address translation cache entries associated with an X86 process context identifier.

     상세보기
114. Vishkin, Uzi Y., Spawn-join instruction set architecture for providing explicit multithreading.

     상세보기
115. Shailender Chaudhry ; Marc Tremblay, Supporting multi-dimensional space-time computing through object versioning.

     상세보기
116. Evans,Martin Robert; Devereux,Ian Victor, Synchronization between pipelines in a data processing apparatus utilizing a synchronization queue.

     상세보기
117. Reinmuth Armin,DEX, Synchronization of a computer system having a plurality of processors.

     상세보기
118. Kottapalli, Sailesh; Crawford, John H., Synchronizing multiple threads efficiently.

     상세보기
119. Kottapalli, Sailesh; Crawford, John H., Synchronizing multiple threads efficiently.

     상세보기
120. Kottapalli, Sailesh; Crawford, John H., Synchronizing multiple threads efficiently.

     상세보기
121. Kitajima,Toshiaki; Satou,Takeshi, System LSI architecture and method for controlling the clock of a data processing system through the use of instructions.

     상세보기
122. McCue, Kevin C., System and method for dynamic allocation of software resources.

     상세보기
123. Gaur, Santosh P.; Hall, William Eric, System and method for performing security operations on network data.

     상세보기
124. Faanes, Gregory J.; Lundberg, Eric P.; Scott, Steven L.; Baird, Robert J., System and method for processing memory instructions using a forced order queue.

     상세보기
125. Cormac A. Flanagan ; Andrew B. Bernard, System and method for statically detecting potential race conditions in multi-threaded computer programs.

     상세보기
126. Hopeman, Albert A.; Carey, James E.; Golbus, Bruce F., System for maintaining a buffer pool.

     상세보기
127. Hopeman, Albert A.; Carey, James E.; Golbus, Bruce F., System for maintaining a buffer pool.

     상세보기
128. Timothy C. Shirley, Terminal emulator for interfacing between a communications port and a KVM switch.

     상세보기
129. Borkenhagen, John Michael; Eickemeyer, Richard James; Flynn, William Thomas; Levenstein, Sheldon Bernard; Wottreng, Andrew Henry, Thread switch control in a multithreaded processor system.

     상세보기
130. Doing Richard W. ; Kalla Ronald Nick, Thread switch tuning tool for optimal performance in a computer processor.

     상세보기
131. Hansen Craig C., Virtual memory system with local and global virtual address translation.

     상세보기
132. Potter Eric Thomas ; Merritt John Earl, Virtual processor buffered merge sort for parallel applications.

     상세보기
133. Liang,Chia Yi; Chen,Andy, Workflow defining system and workflow managing system.

     상세보기
더보기