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Process for fabricating layered superlattice materials and making electronic devices including same 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-029/15
출원번호 US-0350323 (1994-12-05)
발명자 / 주소
  • Watanabe Hitoshi (Tokyo CO JPX) Paz De Araujo Carlos A. (Colorado Springs CO) Yoshimori Hiroyuki (Kanagawa CO JPX) Scott Michael C. (Colorado Springs CO) Mihara Takashi (Saitama CO JPX) Cuchiaro Jose
출원인 / 주소
  • Olympus Optical Co., Ltd. (Colorado Springs CO JPX 03) Symetrix Corporation (Colorado Springs CO 02)
인용정보 피인용 횟수 : 33  인용 특허 : 0

초록

A liquid precursor containing a metal is applied to a substrate, RTP baked, and annealed to form a layered superlattice material. Prebaking the substrate and oxygen in the RTP and anneal is essential, except for high bismuth content precursors. Excess bismuth between 110% and 140% of stoichiometry a

대표청구항

A method of fabricating a capacitor, said method comprising the steps of: providing a substrate having a first electrode, and a precursor containing a plurality of metals in effective amounts for forming a layered superlattice material upon thermal treatment of said precursor; applying said precurso

이 특허를 인용한 특허 (33)

  1. Uchiyama, Kiyoshi; Solayappan, Narayan; Paz de Araujo, Carlos A., Chemical vapor deposition process for fabricating layered superlattice materials.
  2. MacDonald, Jeff; Quan, Nancy N.; Hayman, Robert, Dental whitening compositions.
  3. Dougherty T. Kirk ; Drab John J., Environmentally benign Group II and Group IV or V spin-on precursor materials.
  4. Dougherty T. Kirk ; Drab John J. ; Ramer O. Glenn, Environmentally benign bismuth-containing spin-on precursor materials.
  5. Dougherty,Thomas K.; Drab,John J., Environmentally benign lead zirconate titanate ceramic precursor materials.
  6. Hayashi, Shinichiro; Otsuki, Tatsuo; Paz de Araujo, Carlos A., Ferroelectric device with capping layer and method of making same.
  7. Hayashi, Shinichiro; Otsuki, Tatsuo; Paz de Araujo, Carlos A., Ferroelectric device with capping layer and method of making same.
  8. Cuchiaro Joseph D. ; Furuya Akira,JPX ; Paz de Araujo Carlos A. ; Miyasaka Yoichi,JPX, Ferroelectric integrated circuit having low sensitivity to hydrogen exposure and method for fabricating same.
  9. Cuchiaro, Joseph D.; Furuya, Akira; Paz de Araujo, Carlos A.; Miyasaka, Yoichi, Ferroelectric integrated circuit having low sensitivity to hydrogen exposure and method for fabricating same.
  10. Cuchiaro Joseph D. ; Furuya Akira,JPX ; Paz de Araujo Carlos A. ; Miyasaka Yoichi,JPX, Ferroelectric integrated circuit with protective layer incorporating oxygen and method for fabricating same.
  11. Kiyoshi Uchiyama, Integrated circuit device including a layered superlattice material with an interface buffer layer.
  12. Suzuki Masayuki,JPX ; Nagasawa Naomi,JPX ; Machida Akio,JPX ; Ami Takaaki,JPX, Layer-structured oxide and process of producing the same.
  13. Azuma, Masamichi; Paz de Araujo, Carlos A., Metal insulator structure with polarization-compatible buffer layer.
  14. Paz de Araujo, Carlos A.; McMillan, Larry D.; Solayappan, Narayan; Bacon, Jeffrey W., Method and apparatus for fabrication of thin films by chemical vapor deposition.
  15. Paz de Araujo Carlos A. ; McMillan Larry D. ; Solayappan Narayan ; Bacon Jeffrey W., Method and apparatus for preparing integrated circuit thin films by chemical vapor deposition.
  16. Duncombe Peter R. ; Kotecki David E. ; Laibowitz Robert B. ; Natzle Wesley ; Yu Chienfan, Method for cleaning the surface of a dielectric.
  17. Sakai Shigeki,JPX ; Migita Shinji,JPX, Method for crystal growth of multi-element oxide thin film containing bismuth as constituent element.
  18. Cuchiaro Joseph D. ; Furuya Akira,JPX ; Paz de Araujo Carlos A. ; Miyasaka Yoichi,JPX, Method for fabricating ferroelectric integrated circuits.
  19. Ooms William J. ; Marshall Daniel S. ; Hallmark Jerald A., Method for making a ferroelectric semiconductor device and a layered structure.
  20. Lee, Byoung-taek; Lee, Ki-hoon, Method for manufacturing capacitor of semiconductor device having dielectric layer of high dielectric constant.
  21. New Daryl C., Method for oxidation and crystallization of ferroelectric material.
  22. Cuchiaro Joseph D. ; Furuya Akira,JPX ; Paz de Araujo Carlos A. ; Miyasaka Yoichi,JPX, Method of fabricating ferroelectric integrated circuit using dry and wet etching.
  23. Cuchiaro Joseph D. ; Furuya Akira,JPX ; Paz de Araujo Carlos A. ; Miyasaka Yoichi,JPX, Method of fabricating ferroelectric integrated circuit using oxygen to inhibit and repair hydrogen degradation.
  24. Shinichiro Hayashi JP; Larry D. McMillan ; Carlos A. Paz de Araujo, Method of liquid deposition by selection of liquid viscosity and other precursor properties.
  25. Inomata, Daisuke, Method of manufacturing ferroelectric capacitor.
  26. Hsieh Wen-Yi,TWX ; Huang Kuo-Tai,TWX, Method of reducing leakage current in dielectric.
  27. Dougherty T. Kirk ; Drab John J. ; Ramer O. Glenn, Non-toxic solvent soluble group IV and V metal acid salt complexes using polyether acid anhydrides.
  28. Dougherty Thomas K. ; Ramer O. Glenn, Process for forming thin film metal oxide materials having improved electrical properties.
  29. Dougherty Thomas K. ; Ramer O. Glenn, Process for making stoichiometric mixed metal oxide films.
  30. Uchiyama, Kiyoshi; Paz de Araujo, Carlos A.; Tanaka, Keisuke, Rapid-temperature pulsing anneal method at low temperature for fabricating layered superlattice materials and making electronic devices including same.
  31. Azuma Masamichi ; McMillan Larry D. ; Paz de Araujo Carlos A. ; Scott Michael C., UV radiation process for making electronic devices having low-leakage-current and low-polarization fatigue.
  32. Dougherty, T. Kirk; Drab, John J., Water-soluble group III polyether acid salt complexes and thin films from same.
  33. Dougherty,T. Kirk; Drab,John J., Water-soluble group III polyether acid salt complexes and thin films from same.
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