이 특허를 인용한 특허 (53)

1. Mar, Monte, Apparatus and method for programmable power management in a programmable analog circuit block.

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2. Sullam, Bert; Kutz, Harold; Mar, Monte; Thiagaragen, Eashwar; Williams, Timothy; Wright, David G., Autonomous control in a programmable system.

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3. Sadaaki Yokoo JP; Kenji Tanaka JP; Hironori Ura JP; Kanako Kasai JP, Battery power source protecting device for an electromotive device.

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4. Roe, Steve; Nemecek, Craig, Breakpoint control in an in-circuit emulation system.

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5. Wright, David G.; Williams, Timothy J., Circuit and method for improving the accuracy of a crystal-less oscillator having dual-frequency modes.

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6. Best, Andrew; Ogami, Kenneth; Zhaksilikov, Marat, Configuration of programmable IC design elements.

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7. Yamamoto, Shinzou, DC regulated power supply.

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8. Yamamoto,Shinzou, DC regulated power supply comprising.

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9. Pleis,Matthew A.; Ogami,Kenneth Y., Dynamic reconfiguration interrupt system and method.

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10. Nemecek, Craig; Roe, Steve, External interface for event architecture.

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11. Sumimoto,Katsuyuki; Sasaki,Junya; Higashino,Kyoko, Generator control apparatus.

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12. Pleis, Matthew A.; Ogami, Kenneth Y.; Zhaksilikov, Marat, Graphical user interface for dynamically reconfiguring a programmable device.

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13. Anderson, Doug, Graphical user interface with user-selectable list-box.

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14. Nemecek, Craig; Roe, Steve, In-circuit emulator and pod synchronized boot.

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15. Seguine, Dennis R., Input/output multiplexer bus.

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16. Sequine, Dennis R., Input/output multiplexer bus.

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17. Snyder, Warren S.; Mar, Monte, Microcontroller programmable system on a chip.

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18. Snyder, Warren S.; Mar, Monte, Microcontroller programmable system on a chip.

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19. Snyder, Warren S.; Mar, Monte, Microcontroller programmable system on a chip.

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20. Snyder, Warren, Microcontroller programmable system on a chip with programmable interconnect.

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21. Snyder, Warren S, Microcontroller programmable system on a chip with programmable interconnect.

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22. Kutz, Harold, Numerical band gap.

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23. Saxena, Sunit Kumar; Santhirahasan, Venkatesan; Anghel, Cristian, Optimal utilization of power converters based on thermal characteristics.

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24. Snyder, Warren S.; Mar, Monte, PSOC architecture.

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25. Snyder, Warren; Mar, Monte, PSOC architecture.

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26. Snyder, Warren S.; Mar, Monte, PSoC architecture.

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27. Snyder, Warren S.; Mar, Monte, PSoC architecture.

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28. Ogami, Kenneth Y., Power management architecture, method and configuration system.

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29. Ogami, Kenneth Y., Power management architecture, method and configuration system.

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30. Uejima Hiroto,JPX ; Okuda Hidenori,JPX ; Okuda Isamu,JPX ; Uno Takashi,JPX ; Masuzawa Toshikazu,JPX, Power supply circuit.

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31. Asao Yoshihito (Tokyo JPX), Power supply system.

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32. Neumann Peter W., Power supply system for battery operated devices.

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33. Snyder, Warren, Programmable microcontroller architecture.

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34. Snyder, Warren; Mar, Monte, Programmable microcontroller architecture(mixed analog/digital).

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35. Snyder, Warren; Mar, Monte, Programmable microcontroller architecture(mixed analog/digital).

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36. Thiagarajan, Eashwar; Sivadasan, Mohandas Palatholmana; Rohilla, Gajender; Kutz, Harold; Mar, Monte, Programmable sigma-delta analog-to-digital converter.

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37. Nakamura, Yoshihide; Maruyama, Akinori; Ikuta, Yoshinori; Ueta, Keisuke, Protection device for electricity supply circuit.

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38. Pleis, Matthew A.; Sullam, Bert; Lesher, Todd, Reconfigurable testing system and method.

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39. Ishihara, Yutaka; Takahashi, Toru, Switching power supply apparatus with over-temperature protection.

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40. Kuranuki,Masaaki, System and method for controlling a clock oscillator and power supply voltage based on the energy consumed for processing a predetermined amount of data.

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41. Ogami, Kenneth; Best, Andrew; Zhaksilikov, Marat, System and method for controlling a target device.

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42. Cooper, Barnes, System and method for dynamically adjusting to CPU performance changes.

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43. Ogami, Kenneth Y.; Hood, Frederick R., System and method for performing next placements and pruning of disallowed placements for programming an integrated circuit.

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44. Ogami, Kenneth Y.; Hood, III, Frederick R., System and method for performing next placements and pruning of disallowed placements for programming an integrated circuit.

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45. Sullam, Bert; Snyder, Warren; Mohammed, Haneef, System level interconnect with programmable switching.

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46. Sullam, Bert; Snyder, Warren; Mohammed, Haneef, System level interconnect with programmable switching.

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47. Ogami, Kenneth Y.; Anderson, Doug; Pleis, Matthew; Hood, III, Frederick Redding, Techniques for generating microcontroller configuration information.

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48. Ogami, Kenneth Y.; Anderson, Doug; Pleis, Matthew; Hood, Rick, Techniques for generating microcontroller configuration information.

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49. Venkataraman, Garthik; Kutz, Harold; Mar, Monte, Temperature sensor with digital bandgap.

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50. Barnes Cooper, Thermal control within systems having multiple CPU performance states.

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51. Melanson, John L.; Fei, Xiaofan; Gaboriau, Johann G.; Green, Steven; Rhode, Jason P.; Walburger, Eric; Taylor, Jr., Wilson E., Thermal feedback for switch mode amplification.

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52. Sivadasan, Mohandas Palatholmana; Rohilla, Gajendar, Voltage controlled oscillator delay cell and method.

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53. Redford, Simon James; Juby, Lee; Derby, James William; Mangan, Stephen James, Voltage regulation device.

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