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Power controller reset during load starting 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H02H-003/00
출원번호 US-0331278 (1994-10-28)
발명자 / 주소
  • Parkinson Gerald W. (Shelton CT)
출원인 / 주소
  • United Technologies Corporation (Hartford CT 02)
인용정보 피인용 횟수 : 61  인용 특허 : 0

초록

A solid state power controller is automatically reset if an overload trip occurs during a start-up delay period. If an overload trip occurs during load starting, the SSPC remains tripped for a reset delay period, and thereafter the SSPC is automatically reset, thereby allowing the starting process t

대표청구항

A start-up reset control for a solid-state power controller (SSPC), the SSPC being responsive to the presence of a COMMAND signal for applying a source voltage to at least one load, thereby resulting in the development of a load current, the SSPC interrupting the application of the source voltage to

이 특허를 인용한 특허 (61)

  1. Rozman, Gregory I.; Moss, Steven J., Active damping with a switched capacitor.
  2. Rozman, Gregory I.; Moss, Steven J., Active damping with a switched capacitor.
  3. Mar, Monte, Apparatus and method for programmable power management in a programmable analog circuit block.
  4. Lazarovich,David; Rusan,Ileana; Knight,David, Arc fault detection for SSPC based electrical power distribution systems.
  5. Sullam, Bert; Kutz, Harold; Mar, Monte; Thiagaragen, Eashwar; Williams, Timothy; Wright, David G., Autonomous control in a programmable system.
  6. Roe, Steve; Nemecek, Craig, Breakpoint control in an in-circuit emulation system.
  7. Wright, David G.; Williams, Timothy J., Circuit and method for improving the accuracy of a crystal-less oscillator having dual-frequency modes.
  8. Synder, Warren; Sullam, Bert, Clock driven dynamic datapath chaining.
  9. Nemecek, Craig, Conditional branching in an in-circuit emulation system.
  10. Best, Andrew; Ogami, Kenneth; Zhaksilikov, Marat, Configuration of programmable IC design elements.
  11. Rozman, Gregory I.; Moss, Steven J., Direct current bus management controller.
  12. Rozman, Gregory I.; Moss, Steven J., Direct current electric power system with active damping.
  13. Synder, Warren; Sullam, Bert, Dynamically configurable and re-configurable data path.
  14. Nemecek, Craig; Roe, Steve, External interface for event architecture.
  15. Pleis, Mathew A; Ogami, Kenneth Y; Zhaksilikov, Marat, Graphical user interface for dynamically reconfiguring a programmable device.
  16. Pleis, Matthew A.; Ogami, Kenneth Y.; Zhaksilikov, Marat, Graphical user interface for dynamically reconfiguring a programmable device.
  17. Anderson, Doug, Graphical user interface with user-selectable list-box.
  18. Nemecek, Craig; Roe, Steve, In-circuit emulator and pod synchronized boot.
  19. Seguine, Dennis R., Input/output multiplexer bus.
  20. Sequine, Dennis R., Input/output multiplexer bus.
  21. Perrin, Jon; Seguine, Dennis, Method for parameterizing a user module.
  22. Snyder, Warren S.; Mar, Monte, Microcontroller programmable system on a chip.
  23. Snyder, Warren S.; Mar, Monte, Microcontroller programmable system on a chip.
  24. Snyder, Warren S.; Mar, Monte, Microcontroller programmable system on a chip.
  25. Snyder, Warren, Microcontroller programmable system on a chip with programmable interconnect.
  26. Snyder, Warren S, Microcontroller programmable system on a chip with programmable interconnect.
  27. McDonald, John; Pearson, Jon; Ogami, Kenneth; Anderson, Doug, Model for a hardware device-independent method of defining embedded firmware for programmable systems.
  28. Rozman, Gregory I.; Moss, Steven J., Multi-functional solid state power controller.
  29. Kutz, Harold, Numerical band gap.
  30. Snyder, Warren S.; Mar, Monte, PSOC architecture.
  31. Snyder, Warren; Mar, Monte, PSOC architecture.
  32. Snyder, Warren S.; Mar, Monte, PSoC architecture.
  33. Snyder, Warren S.; Mar, Monte, PSoC architecture.
  34. Tofigh, Farshid; Kruppa, Otmar; Khan, Imtiaz; Ghahramani, Iraj; Lawton, David; Policky, Kent, Power distribution system using solid state power controllers.
  35. Ogami, Kenneth Y., Power management architecture, method and configuration system.
  36. Ogami, Kenneth Y., Power management architecture, method and configuration system.
  37. Kutz, Harold; Snyder, Warren, Power on reset circuit for a microcontroller.
  38. Snyder, Warren, Programmable microcontroller architecture.
  39. Snyder, Warren; Mar, Monte, Programmable microcontroller architecture(mixed analog/digital).
  40. Snyder, Warren; Mar, Monte, Programmable microcontroller architecture(mixed analog/digital).
  41. Thiagarajan, Eashwar; Sivadasan, Mohandas Palatholmana; Rohilla, Gajender; Kutz, Harold; Mar, Monte, Programmable sigma-delta analog-to-digital converter.
  42. Snyder, Warren; Maheshwari, Dinesh; Ogami, Kenneth; Hastings, Mark, Providing hardware independence to automate code generation of processing device firmware.
  43. Pleis, Matthew A.; Sullam, Bert; Lesher, Todd, Reconfigurable testing system and method.
  44. Rozman, Gregory I.; Moss, Steven J., Regenerative load electric power management systems and methods.
  45. Nemecek, Craig, Sleep and stall in an in-circuit emulation system.
  46. Liu, Zhenning; Fuller, Randy; Pearson, Wayne, Solid state power control system for aircraft high voltage DC power distribution.
  47. Rozman, Gregory I.; Moss, Steven J., Solid state power controller for high voltage direct current systems.
  48. Tofigh, Farshid; Kruppa, Otmar; Khan, Imtiaz; Ghahramani, Iraj; Lawton, David; Policky, Kent, Solid state power controllers including current sensing circuitry is configured to bias a general signal to a predetermined level in order to substantially eliminate the offset error in an amplifier and an A/D converter.
  49. Ogami, Kenneth; Best, Andrew; Zhaksilikov, Marat, System and method for controlling a target device.
  50. Anderson, Douglas H.; Ogami, Kenneth Y., System and method for dynamically generating a configuration datasheet.
  51. Ogami, Kenneth Y.; Hood, Frederick R., System and method for performing next placements and pruning of disallowed placements for programming an integrated circuit.
  52. Ogami, Kenneth Y.; Hood, III, Frederick R., System and method for performing next placements and pruning of disallowed placements for programming an integrated circuit.
  53. Sullam, Bert; Snyder, Warren; Mohammed, Haneef, System level interconnect with programmable switching.
  54. Sullam, Bert; Snyder, Warren; Mohammed, Haneef, System level interconnect with programmable switching.
  55. Ogami, Kenneth Y.; Anderson, Doug; Pleis, Matthew; Hood, III, Frederick Redding, Techniques for generating microcontroller configuration information.
  56. Ogami, Kenneth Y.; Anderson, Doug; Pleis, Matthew; Hood, Rick, Techniques for generating microcontroller configuration information.
  57. Venkataraman, Garthik; Kutz, Harold; Mar, Monte, Temperature sensor with digital bandgap.
  58. Beard, Paul; Woodings, Ryan Winfield, Touch wake for electronic devices.
  59. Bartz, Manfred; Zhaksilikov, Marat; Anderson, Doug, User interface for efficiently browsing an electronic document using data-driven tabs.
  60. Sivadasan, Mohandas Palatholmana; Rohilla, Gajendar, Voltage controlled oscillator delay cell and method.
  61. Tofigh, Farshid; Kruppa, Otmar; Khan, Imtiaz; Ghahramani, Iraj; Lawton, David; Policky, Kent, Voltage sensing circuitry for solid state power controllers.
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