[특허]Semiconductor device having a plurality of semiconductor chips

Semiconductor device having a plurality of semiconductor chips 원문보기

IPC분류정보
국가/구분	United States(US) Patent 등록
국제특허분류(IPC7판)	H01L-023/16 H01L-023/28
출원번호	US-0125844 (1993-09-24)
우선권정보	JP-0272009 (1992-10-09)
발명자 / 주소	Waki Masaki (Kagoshima JPX) Honda Tosiyuki (Kawasaki JPX) Gomi Yukio (Kawasaki JPX)
출원인 / 주소	Fujitsu Limited (Kawasaki JPX 03) Kyushu Fujitsu Electronics Limited (Satsuma JPX 03)
인용정보	피인용 횟수 : 29 인용 특허 : 0

초록 ▼

A semiconductor device includes at least a first semiconductor chip and a second semiconductor chip each having a first surface and a second surface. The second surface of the first semiconductor chip confronts the first surface of the second semiconductor chip. Additionally, the semiconductor device includes a plurality of leads having inner portions and outer portions, where the inner portions of the leads are electrically coupled to selected portions on one of the first and second surfaces of each of the first and second semiconductor chips. An insulator is interposed between the second surface of the first semiconductor chip and the first surface of the second semiconductor chip at portions other than the selected portions. Further, a resin package encapsulates the first and second semiconductor chips so that the outer portions of the leads project outside the resin package.

대표청구항 ▼

A semiconductor device comprising: a first semiconductor chip and a second semiconductor chip, each of said first and second semiconductor chips having a first surface and a second surface and respective first and second surface areas, the second surface of said first semiconductor chip confronting the first surface of said second semiconductor chip; a plurality of leads having inner portions and outer portions, said inner portions of said leads being electrically coupled to corresponding, selected surface portions on one of the first and second surfaces of each of said first and second semiconductor chips; an insulator, having first and second surfaces, interposed between the second surface of said first semiconductor chip and the first surface of said second semiconductor chip at portions other than the corresponding, selected surface portions thereof and so that each respective area of the first and second surfaces of said insulator overlaps said first semiconductor chip and overlaps said second semiconductor chip, and each respective area is smaller than the second surface area of said first semiconductor chip and smaller than the first surface area of said second semiconductor chip; and a resin package encapsulating said first and second semiconductor chips so that the outer portions of said leads project outside said resin package, said resin package including resin between the second surface of the first semiconductor chip and the first surface of the second semiconductor chip.

이 특허를 인용한 특허 (29)

Leonard E. Mess, Ball grid array (BGA) encapsulation mold.
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Mess Leonard E., Ball grid array (BGA) encapsulation mold.
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Mess Leonard E., Ball grid array (BGA) encapsulation mold.
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Mess Leonard E., Ball grid array (BGA) encapsulation mold.
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Kim Yong Chan,KRX, Bottom lead semiconductor chip stack package.
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Soller, Tyrone Jon Donato, Chip package and method of manufacturing the same.
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Mess, Leonard E., Encapsulation method in a molding machine for an electronic device.
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Ke, Chun-Chi; Lo, Randy H. Y.; Wu, ChiChuan, Flash-preventing semiconductor package.
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Pohl Jens,DEX ; Blumenauer Michael,DEX ; Vidal Ulrich,DEX, Leadframe for semiconductor chips and semiconductor module having the lead frame.
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Kishida, Katsuhiko; Miyamoto, Hirofumi; Maruyama, Yoshiaki; Kamimoto, Yuji, Matrix type display apparatus, method of production thereof, and thermo-compression bonding head.
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Akram,Salman, Method of fabricating mounted multiple semiconductor dies in a package.
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Hubbard,Robert L.; Milla,Juan G., Method of forming a high-voltage/high-power die package.
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Leonard E. Mess, Methods for ball grid array (BGA) encapsulation mold.
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Robert Newell Bryan ; Daniel Eisenreich, Miniature 3D multi-chip module.
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Akram Salman, Mounting multiple semiconductor dies in a package.
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Akram Salman, Mounting multiple semiconductor dies in a package.
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Ball Michael B., Multi-chip device and method of fabrication employing leads over and under processes.
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Ball Michael B. (Boise ID), Multi-chip device and method of fabrication employing leads over and under processes.
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Palagonia Anthony M. ; Cronin John E., Multichip module.
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Koyama,Yugo; Miyazaki,Katsuhiko; Shimodaira,Kazuhiko; Nakajima,Yukari, Piezoelectric oscillator, manufacturing method thereof, and electronic device.
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Koyama,Yugo; Miyazaki,Katsuhiko; Shimodaira,Kazuhiko; Nakajima,Yukari, Piezoelectric oscillator, manufacturing method thereof, and electronic device.
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Masachika Masuda JP; Tamaki Wada JP; Hirotaka Nishizawa JP; Koich Iro Kagaya JP, Semiconductor device.
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Takenaka Masashi,JPX ; Kasai Junichi,JPX ; Mizukoshi Masataka,JPX ; Yamashita Taturou,JPX, Semiconductor device and method for manufacturing such.
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An Min Cheol,KRX ; Jeong Do Soo,KRX, Stacked chip package device employing a plurality of lead on chip type semiconductor chips.
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Cho Jae Weon,KRX, Stacking type semiconductor chip package.
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Low, Chau Chin; Woo, Oscar; Fabry, Michael R.; Junge, Terry A.; Yin, Tiang Fee; Aw, Choon An; Olson, Jonathan E., Surface mount IC stacking method and device.
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Yoshikazu Fujimori JP, Tape carrier device for a tab.
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Takahashi, Yoshikazu; Kobayashi, Kaname, Tape carrier package having stacked semiconductor elements, and short and long leads.
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Takahashi,Yoshikazu; Kobayashi,Kaname, Tape carrier package having stacked semiconductor elements, and short and long leads.
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IPC	Description
A	생활필수품
A62	인명구조; 소방(사다리 E06C)
A62B	인명구조용의 기구, 장치 또는 방법(특히 의료용에 사용되는 밸브 A61M 39/00; 특히 물에서 쓰이는 인명구조 장치 또는 방법 B63C 9/00; 잠수장비 B63C 11/00; 특히 항공기에 쓰는 것, 예. 낙하산, 투출좌석 B64D; 특히 광산에서 쓰이는 구조장치 E21F 11/00)
A62B-1/08	.. 윈치 또는 풀리에 제동기구가 있는 것

내보내기 구분	파일저장 인쇄 메일전송
구성항목	기본정보 상세정보 관리번호, 국가코드, 자료구분, 상태, 출원번호, 출원일자, 공개번호, 공개일자, 등록번호, 등록일자, 발명명칭(한글), 발명명칭(영문), 출원인(한글), 출원인(영문), 출원인코드, 대표IPC 관리번호, 국가코드, 자료구분, 상태, 출원번호, 출원일자, 공개번호, 공개일자, 공고번호, 공고일자, 등록번호, 등록일자, 발명명칭(한글), 발명명칭(영문), 출원인(한글), 출원인(영문), 출원인코드, 대표출원인, 출원인국적, 출원인주소, 발명자, 발명자E, 발명자코드, 발명자주소, 발명자 우편번호, 발명자국적, 대표IPC, IPC코드, 요약, 미국특허분류, 대리인주소, 대리인코드, 대리인(한글), 대리인(영문), 국제공개일자, 국제공개번호, 국제출원일자, 국제출원번호, 우선권, 우선권주장일, 우선권국가, 우선권출원번호, 원출원일자, 원출원번호, 지정국, Citing Patents, Cited Patents
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연합인증

Semiconductor device having a plurality of semiconductor chips 원문보기

초록 ▼

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연구과제 타임라인

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Semiconductor device having a plurality of semiconductor chips 원문보기

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이 특허를 인용한 특허 (29)

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