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Method for forming a mesa-isolated SOI transistor having a split-process polysilicon gate 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/265
출원번호 US-0228043 (1994-04-15)
발명자 / 주소
  • Pollack Gordon P. (Richardson TX)
출원인 / 주소
  • Texas Instruments Incorporated (Dallas TX 02)
인용정보 피인용 횟수 : 68  인용 특허 : 0

초록 ▼

A method for forming a mesa-isolated SOI transistor using a split-process polysilicon gate including the steps of depositing a layer of buried oxide (14) on a silicon substrate (12), depositing an SOI layer (16) on buried oxide layer (14), and forming a gate oxide layer (18) on the SOI layer (16). F

대표청구항 ▼

A method for forming a mesa-isolated SOI transistor having improved gate oxide integrity, comprising the steps of: forming an SOI etch mask on an SOI layer, the SOI etch mask comprising a gate oxide layer covered by a polysilicon layer, the polysilicon layer covered by a Si3N4 layer, the SOI etch ma

이 특허를 인용한 특허 (68)

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