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[미국특허] Method of annealing a semiconductor wafer in a hydrogen atmosphere to desorb surface contaminants 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-021/306
  • H01L-021/324
출원번호 US-0199170 (1994-04-26)
우선권정보 JP-0196576 (1992-06-29)
국제출원번호 PCT/JP93/00865 (1993-06-25)
§371/§102 date 19940426 (19940426)
국제공개번호 WO-9400872 (1994-01-06)
발명자 / 주소
  • Horai Masataka (Saga JPX) Adachi Naoshi (Saga JPX) Nishikawa Hideshi (Saga JPX) Sano Masakazu (Saga JPX)
출원인 / 주소
  • Sumitomo Sitix Corporation (Hyogo JPX 03)
인용정보 피인용 횟수 : 46  인용 특허 : 0

초록 ▼

The present invention provides a method of manufacturing a semiconductor wafer whereby (1) deterioration of a micro-roughness in a low temperature range in hydrogen atmospheric treatment and increase of resistivity due to outward diffusion of an electrically active impurity in a high temperature ran

대표청구항 ▼

In a method of manufacturing a semiconductor wafer, a method of heat treatment of a semiconductor silicon substrate during loading of the semiconductor silicon substrate in a furnace having an internal temperature of greater than room temperature by 300°C. or less, said method of heat treatment comp

이 특허를 인용한 특허 (46) 인용/피인용 타임라인 분석

  1. Binns, Martin Jeffrey; Falster, Robert J.; Libbert, Jeffrey L., Control of oxygen precipitate formation in high resistivity CZ silicon.
    상세보기
  2. Henley, Francois J.; Cheung, Nathan W., Controlled process and resulting device.
    상세보기
  3. Henley, Francois J.; Cheung, Nathan W., Controlled process and resulting device.
    상세보기
  4. Shen, Meihua; Wang, Xikun; Liu, Wei; Du, Yan; Deshmukh, Shashank, Device and method for etching flash memory gate stacks comprising high-k dielectric.
    상세보기
  5. Yamazaki Shunpei,JPX ; Teramoto Satoshi,JPX ; Koyama Jun,JPX ; Ogata Yasushi,JPX ; Hayakawa Masahiko,JPX ; Osame Mitsuaki,JPX, Display switch with double layered gate insulation and resinous interlayer dielectric.
    상세보기
  6. Mani, Radhika; Gani, Nicolas; Liu, Wei; Shen, Meihua; Deshmukh, Shashank C., Etching high K dielectrics with high selectivity to oxide containing layers at elevated temperatures with BC13 based etch chemistries.
    상세보기
  7. Yamazaki,Shunpei; Teramoto,Satoshi; Koyama,Jun; Ogata,Yasushi; Hayakawa,Masahiko; Osame,Mitsuaki, Fabrication method of semiconductor device.
    상세보기
  8. Yamazaki,Shunpei; Teramoto,Satoshi; Koyama,Jun; Ogata,Yasushi; Hayakawa,Masahiko; Osame,Mitsuaki, Fabrication method of semiconductor device.
    상세보기
  9. Ronald A. Weimer ; Yongjun Jeff Hu ; Pai Hung Pan ; Deepa Ratakonda ; James Beck ; Randhir P. S. Thakur, Forming a conductive structure in a semiconductor device.
    상세보기
  10. Weimer, Ronald A.; Hu, Yongjun Jeff; Pan, Pai Hung; Ratakonda, Deepa; Beck, James; Thakur, Randhir P. S., Forming a conductive structure in a semiconductor device.
    상세보기
  11. Matsushita Junichi,JPX ; Yoshikawa Jun,JPX ; Sanada Masayuki,JPX ; Shimizu Tatsuya,JPX, Hydrogen heat treatment method of silicon wafers using a high-purity inert substitution gas.
    상세보기
  12. Henley, Francois J., Layer transfer of films utilizing controlled propagation.
    상세보기
  13. Henley, Francois J., Layer transfer of films utilizing controlled shear region.
    상세보기
  14. Henley, Francois J., Method and structure for fabricating solar cells using a thick layer transfer process.
    상세보기
  15. Binns,Martin J.; Falster,Robert J.; Libbert,Jeffrey L., Method for controlling of thermal donor formation in high resistivity CZ silicon.
    상세보기
  16. Yamazaki,Shunpei; Teramoto,Satoshi; Koyama,Jun; Ogata,Yasushi; Hayakawa,Masahiko; Osame,Mitsuaki, Method for fabricating a semiconductor device.
    상세보기
  17. Yamazaki,Shunpei; Teramoto,Satoshi; Koyama,Jun; Ogata,Yasushi; Hayakawa,Masahiko; Osame,Mitsuaki, Method for fabricating a semiconductor device.
    상세보기
  18. Shunpei Yamazaki JP; Satoshi Teramoto JP; Jun Koyama JP; Yasushi Ogata JP; Masahiko Hayakawa JP; Mitsuaki Osame JP, Method for fabricating a semiconductor device using a metal catalyst and high temperature crystallization.
    상세보기
  19. Oka, Satoshi; Noto, Nobuhiko, Method for manufacturing bonded wafer.
    상세보기
  20. Yamazaki,Shunpei; Ohtani,Hisashi; Hamatani,Toshiji, Method of manufacturing a semiconductor device.
    상세보기
  21. Falster Robert J.,ITX, Process for preparing an ideal oxygen precipitating silicon wafer.
    상세보기
  22. Falster, Robert J., Process for the preparation of an ideal oxygen precipitating silicon wafer capable of forming an enhanced denuded zone.
    상세보기
  23. Falster, Robert J., Process for the preparation of an ideal oxygen precipitating silicon wafer having an asymmetrical vacancy concentration profile capable of forming an enhanced denuded zone.
    상세보기
  24. Henley, Francois J.; Brailove, Adam, Race track configuration and method for wafering silicon solar substrates.
    상세보기
  25. Yamazaki, Shunpei; Teramoto, Satoshi; Koyama, Jun; Ogata, Yasushi; Hayakawa, Masahiko; Osame, Mitsuaki; Ohtani, Hisashi; Hamatani, Toshiji, Semiconductor active region of TFTs having radial crystal grains through the whole area of the region.
    상세보기
  26. Yamazaki Shunpei,JPX ; Teramoto Satoshi,JPX ; Koyama Jun,JPX ; Ogata Yasushi,JPX ; Hayakawa Masahiko,JPX ; Osame Mitsuaki,JPX, Semiconductor device and fabrication method thereof.
    상세보기
  27. Yamazaki Shunpei,JPX ; Teramoto Satoshi,JPX ; Koyama Jun,JPX ; Ogata Yasushi,JPX ; Hayakawa Masahiko,JPX ; Osame Mitsuaki,JPX, Semiconductor device and fabrication method thereof.
    상세보기
  28. Yamazaki, Shunpei; Teramoto, Satoshi; Koyama, Jun; Ogata, Yasushi; Hayakawa, Masahiko; Osame, Mitsuaki, Semiconductor device and fabrication method thereof.
    상세보기
  29. Shunpei Yamazaki JP; Satoshi Teramoto JP; Jun Koyama JP; Yasushi Ogata JP; Masahiko Hayakawa JP; Mitsuaki Osame JP; Hisashi Ohtani JP; Toshiji Hamatani JP, Semiconductor device and its manufacturing method.
    상세보기
  30. Yamazaki, Shunpei; Teramoto, Satoshi; Koyama, Jun; Ogata, Yasushi; Hayakawa, Masahiko; Osame, Mitsuaki; Ohtani, Hisashi; Hamatani, Toshiji, Semiconductor device and its manufacturing method.
    상세보기
  31. Yamazaki, Shunpei; Teramoto, Satoshi; Koyama, Jun; Ogata, Yasushi; Hayakawa, Masahiko; Osame, Mitsuaki; Ohtani, Hisashi; Hamatani, Toshiji, Semiconductor device and its manufacturing method.
    상세보기
  32. Yamazaki,Shunpei; Teramoto,Satoshi; Koyama,Jun; Ogata,Yasushi; Hayakawa,Masahiko; Osame,Mitsuaki; Ohtani,Hisashi; Hamatani,Toshiji, Semiconductor device and its manufacturing method.
    상세보기
  33. Yamazaki, Shunpei; Teramoto, Satoshi; Koyama, Jun; Ogata, Yasushi; Hayakawa, Masahiko; Osame, Mitsuaki; Ohtani, Hisashi; Hamatani, Toshiji, Semiconductor device and method for fabricating the same.
    상세보기
  34. Yamazaki, Shunpei; Teramoto, Satoshi; Koyama, Jun; Ogata, Yasushi; Hayakawa, Masahiko; Osame, Mitsuaki; Ohtani, Hisashi; Hamatani, Toshiji, Semiconductor device and method for fabricating the same.
    상세보기
  35. Yamazaki,Shunpei; Teramoto,Satoshi; Koyama,Jun; Ogata,Yasushi; Hayakawa,Masahiko; Osame,Mitsuaki; Ohtani,Hisashi; Hamatani,Toshiji, Semiconductor device and method for fabricating the same.
    상세보기
  36. Yamazaki, Shunpei; Teramoto, Satoshi; Koyama, Jun; Ogata, Yasushi; Hayakawa, Masahiko; Osame, Mitsuaki; Ohtani, Hisashi; Hamatani, Toshiji, Semiconductor device and method of fabricating same.
    상세보기
  37. Yamazaki,Shunpei; Teramoto,Satoshi; Koyama,Jun; Ogata,Yasushi; Hayakawa,Masahiko; Osame,Mitsuaki; Ohtani,Hisashi; Hamatani,Toshiji, Semiconductor device and method of fabricating same.
    상세보기
  38. Yamazaki,Shunpei; Teramoto,Satoshi; Koyama,Jun; Ogata,Yasushi; Hayakawa,Masahiko; Osame,Mitsuaki; Ohtani,Hisashi; Hamatani,Toshiji, Semiconductor device having a crystalline semiconductor film.
    상세보기
  39. Malik, Igor J.; Kang, Sien G., Smoothing method for cleaved films made using a release layer.
    상세보기
  40. Igor J. Malik ; Sien G. Kang, Smoothing method for cleaved films made using thermal treatment.
    상세보기
  41. Henley, Francois; Lamm, Al; Chow, Yi-Lei, Substrate cleaving under controlled stress conditions.
    상세보기
  42. Henley, Francois; Lamm, Al; Chow, Yi-Lei, Substrate cleaving under controlled stress conditions.
    상세보기
  43. Henley, Francois; Lamm, Al; Chow, Yi-Lei, Substrate cleaving under controlled stress conditions.
    상세보기
  44. Kang,Sien G.; Malik,Igor J., Surface finishing of SOI substrates using an EPI process.
    상세보기
  45. Brailove, Adam; Liu, Zuqin; Henley, Francois J.; Lamm, Albert J., Techniques for forming thin films by implantation with reduced channeling.
    상세보기
  46. Kang, Sien G.; Malik, Igor J., Treatment method of film quality for the manufacture of substrates.
    상세보기

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