이 특허를 인용한 특허 (27) 인용/피인용 타임라인 분석

1. Fartash,Arjang, Compressive alpha-tantalum thin film stack.

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2. Chopra, Dinesh; Fishburn, Fred, Conductive connection forming methods, oxidation reducing methods, and integrated circuits formed thereby.

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3. Chopra, Dinesh; Fishburn, Fred, Conductive connection forming methods, oxidation reducing methods, and integrated circuits formed thereby.

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4. Chopra,Dinesh; Fishburn,Fred, Conductive connection forming methods, oxidation reducing methods, and integrated circuits formed thereby.

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5. Chopra,Dinesh; Fishburn,Fred, Conductive connection forming methods, oxidation reducing methods, and integrated circuits formed thereby.

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6. Chopra,Dinesh; Fishburn,Fred, Conductive connection forming methods, oxidation reducing methods, and integrated circuits formed thereby.

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7. Chern Chyi ; Danek Michal ; Liao Marvin,SGX ; Mosely Roderick C. ; Littau Karl ; Raaijmakers Ivo ; Smith David C., Construction of a film on a semiconductor wafer.

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8. Chyi Chern ; Michal Danek ; Marvin Liao SG; Roderick C. Mosely ; Karl Littau ; Ivo Raaijmakers ; David C. Smith, Construction of a film on a semiconductor wafer.

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9. Mehta Sunil D. ; En William G. ; Chan Darin Arthur ; Lee Raymond Takling, Formation of a barrier layer for tungsten damascene interconnects by nitrogen implantation of amorphous silicon or polysilicon.

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10. Kaneko, Toshiki; Ono, Kikuo; Ikeda, Hajime; Terakado, Masatomo, Liquid crystal display device having conductive lines formed with amorphous oxide conductive layer on metal layer and method of fabrication thereof.

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11. Fartash, Arjang, Method for forming compressive alpha-tantalum on substrates and devices including the same.

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12. Yamazaki,Shunpei; Yamaguchi,Naoaki; Nakajima,Setsuo, Method for manufacturing a semiconductor device.

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13. Yamazaki Shunpei,JPX ; Ohtani Hisashi,JPX ; Ohnuma Hideto,JPX, Method for producing semiconductor device.

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14. Yamazaki, Shunpei; Ohtani, Hisashi; Ohnuma, Hideto, Method for producing semiconductor device.

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15. Chang Ming-Hsung,TWX ; Weng Chun-Wen,TWX, Method for stabilizing polysilicon resistors.

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16. Kim Do Heyoung,KRX, Method of fabricating metal line structure.

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17. Arao,Tatsuya, Method of manufacturing a semiconductor device that includes changing the internal stress of a conductive film.

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18. Solo de Zaldivar Jose (Wadenswil CHX), Method of manufacturing an antifuse utilizing nitrogen implantation.

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19. Yamazaki, Shunpei; Yamaguchi, Naoaki; Nakajima, Setsuo, Semiconductor device and method for producing it.

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20. Arao, Tatsuya, Semiconductor device and method of manufacturing the same.

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21. Arao, Tatsuya, Semiconductor device and method of manufacturing the same.

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22. Ohtani,Hisashi, Semiconductor device having insulated gate electrode.

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23. Ohtani Hisashi,JPX, Semiconductor device with insulated gate electrode configured for reducing electric field adjacent drain.

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24. Hiroki Adachi JP; Shunpei Yamazaki JP, Semiconductor device with metal-oxide conductors.

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25. Watanabe Takuya,JPX ; Yaegashi Hiroyuki,JPX ; Noto Hideki,JPX ; Kida Tetsuya,JPX, Thin film transistor and method of manufacturing same.

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26. Ukita Tooru,JPX, Thin film transistor substrate having low resistive and chemical resistant electrode interconnections and method of fo.

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27. Ukita Tooru,JPX, Thin film transistor substrate having low resistive and chemical resistant electrode interconnections and method of forming the same.

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