초록 ▼

A technique for generating real-time events (control signal state changes) in a TDMA (Time Division Multiple Access) wireless digital communications system integrates the functions of a Burst Mode Controller (BMC) and a microcontroller onto a single chip, organizing them such that the BMC\s “frame p

A technique for generating real-time events (control signal state changes) in a TDMA (Time Division Multiple Access) wireless digital communications system integrates the functions of a Burst Mode Controller (BMC) and a microcontroller onto a single chip, organizing them such that the BMC\s “frame program”(defining time slot and bit times for real-time events) shares an instruction ROM with the microcontroller. An automatic DMA mechanism within the BMC retrieves event definitions from within the frame program and effects the real-time events defined therein at the appropriate time. The technique permits any combination of signals to be changed at any time, while simultaneously reducing overall chip area, microcontroller overhead, power-consumption and cost.

대표청구항 ▼

A single-chip TDMA communications controller for generating real-time events in a TDMA wireless digital communications system, comprising: a microcontroller core; on-chip memory for storing a program for the microcontroller core and for storing an event list, said event list including one or more ev

A single-chip TDMA communications controller for generating real-time events in a TDMA wireless digital communications system, comprising: a microcontroller core; on-chip memory for storing a program for the microcontroller core and for storing an event list, said event list including one or more event list entries, each event list entry including a bit-time specifier and an event mask; a counter providing current slot count and current bit-time count, said counter synchronized to a TDMA frame rate; automatic data transfer circuitry for accessing event list entries in the on-chip memory; comparison circuitry for providing a match signal when the current slot count bit-time count match a pre-specified slot number and the bit-time specifier in an event list entry accessed by the automatic data transfer circuitry; and an event latch, responsive to the match signal, for receiving the event mask of the event list entry accessed by the automatic data transfer circuitry.