초록 ▼

To produce a polycrystalline, single-phase compound semiconductor layer of the chalcopyrite type ABC2, it is proposed to deposit, on a substrate, a layer structure which comprises a plurality of layers and which contains the components in elemental form, as an interelemental compound or as an alloy,

To produce a polycrystalline, single-phase compound semiconductor layer of the chalcopyrite type ABC2, it is proposed to deposit, on a substrate, a layer structure which comprises a plurality of layers and which contains the components in elemental form, as an interelemental compound or as an alloy, the component C being present in stoichiometric excess. In a rapid annealing process with a heating rate of at least 10°C./s to a processing temperature of at least 350°C., the layer structure is converted into the compound semiconductor ABC2 even after a few seconds, the gas exchange being limited by encapsulation of the layer structure, with the result that an evaporation of the most volatile components is prevented. Highly efficient solar cells can be produced from the semiconductor.

대표청구항 ▼

A process for producing a chalcopyrite semiconductor of the type ABC2, where A is copper, B is indium or gallium, and C is sulfur or selenium, on a substrate, comprising the steps of: producing a layer structure on the substrate by applying the components A, B, and C in elemental form and/or as a bi

A process for producing a chalcopyrite semiconductor of the type ABC2, where A is copper, B is indium or gallium, and C is sulfur or selenium, on a substrate, comprising the steps of: producing a layer structure on the substrate by applying the components A, B, and C in elemental form and/or as a binary interelemental compound B2C3, the component C being present in an excess which forms up to twice a stoichiometrically exact proportion of component; rapidly heating the substrate with the layer structure to a processing temperature, which is greater than or equal to 350°C., at a heating rate of at least 10°C./s; and keeping the substrate at the processing temperature for a time interval dt in the range of 10 seconds to 1 hour to perform annealing; providing an encapsulation as a covering above the layer structure at a spacing of less than 5 mm, which encapsulation maintains, throughout the entire annealing process, a partial pressure for the component C which is above the partial pressure of the component C which would develop above a stoichiometrically exact ABC2 semiconductor.