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Method of making multilayer circuit 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H05K-003/36
출원번호 US-0277336 (1994-07-19)
발명자 / 주소
  • DiStefano Thomas H. (Monte Sereno CA) Smith John W. (Palo Alto CA) Karavakis Konstantine N. (Cupertino CA) Kovac Zlata (Los Gatos CA) Fjelstad Joseph (Sunnyvale CA)
출원인 / 주소
  • Tessera, Inc. (San Jose CA 02)
인용정보 피인용 횟수 : 99  인용 특허 : 26

초록

An interposer for interconnection between microelectronic circuit panels has contacts at its surfaces. Each contact has a central axis normal to the surface and a peripheral portion adapted to expand radially outwardly from the central axis responsive to a force applied by a pad on the engaged circu

대표청구항

A method of making a multilayer circuit comprising the steps of: (a) stacking a circuit panel and an interposer so that a first surface of said interposer confronts a surface of said panel, said interposer having a body and conductors having ends adjacent a surface of the body and having a contact a

이 특허에 인용된 특허 (26)

  1. Dery Ronald A. (Winston-Salem NC) Jones Warren C. (Winston-Salem NC) Lynn William J. (Groveland MA) Rowlette John R. (Clemmons NC), Anisotropically conductive adhesive composition.
  2. Grabbe Dimitry G. (Middletown PA), Area array connector.
  3. Wiley John P. (Vestal NY), Bondable via.
  4. Patraw Nils E. (Redondo Beach CA), Compressive pedestal for microminiature connections.
  5. Patraw Nils E. (Redondo Beach CA), Compressive pedestal for microminiature connections.
  6. Patraw Nils E. (Redondo Beach CA), Connector system for coupling to an integrated circuit chip.
  7. Ehrenberg Scott G. (Fishkill NY) Herron L. Wynn (Hopewell Junction NY) Miersch Ekkehard F. (Schoenaich NY DEX) Park Jae (Somers NY) Poetzinger Janet L. (Pleasant Valley NY), Discrete fabrication of multi-layer thin film, wiring structures.
  8. Zifcak Mark S. (Putnam CT) Kosa Bruce G. (Woodstock CT), Electrical circuit board interconnect.
  9. Evans William R. (Clemons NC) Sinisi David B. (Harrisburg PA), Electrical connector for interconnecting arrays of conductive areas.
  10. Honn ; James J. ; Stuby ; Kenneth P., Electrical package for LSI devices and assembly process therefor.
  11. Grabbe Dimitry G. (Middletown PA) Korsunsky Iosif (Harrisburg PA), Electrical socket.
  12. Bindra Perminder S. (South Salem NY) Canfield Dennis A. (Montrose PA) Markovich Voya R. (Endwell NY) McKeveny Jeffrey (Binghamton NY) Ruane Robert E. (Endicott NY) Thomas Edwin L. (Apalachin NY), Encapsulated circuitized power core alignment and lamination.
  13. Dux John B. (Millbrook NY) Poetzinger Janet L. (Pleasant Valley NY) Prestipino Roseanne M. (Beacon NY) Siefering Kevin L. (Cary NC), Fabrication of discrete thin film wiring structures.
  14. Grabbe Dimitry G. (Middletown PA), Field emitter array integrated circuit chip interconnection.
  15. Grabbe Dimitry G. (Middletown PA), High density electrical connector system.
  16. Ciccio Joseph A. (Winchester MA) Thun Rudolf E. (Carlisle MA) Fardy Harry J. (Chelmsford MA), Integrated circuit device package interconnect means.
  17. Patraw Nils E. (Redondo Beach CA), Inverted chip carrier.
  18. Burger Henry A. (Tempe AZ) White Harold E. (Scottsdale AZ), Method of fabricating a multilayer circuit board assembly.
  19. Fox Leslie R. (Boxborough MA) Wade Paul C. (Shirley MA) Schmidt William L. (Acton MA), Method of packaging and powering integrated circuit chips and the chip assembly formed thereby.
  20. Walkup William B. (79 Balance Rock Rd. ; Apt. 22 Seymour CT 06483), Multi-chip module connector element and system.
  21. King Michael M. (Vashon WA) Walter Helen J. (Seattle WA), Multi-layer circuit board bonding method utilizing noble metal coated surfaces.
  22. DiStefano Thomas H. (Bronxville NY) Khandros Igor Y. (Peekskill NY) Grube Gary W. (Monroe NY), Multi-layer circuit construction methods with customization features.
  23. Crepeau Philip C. (San Diego CA), Multilayer printed circuit board.
  24. Benarr, Garry M.; Burns, Terry A.; Walker, William J., Pinless connector interposer and method for making the same.
  25. Kurosawa Keiji (Nagano JPX) Yamamoto Kenji (Nagano JPX) Yamashita Mirsuo (Nagano JPX) Mitsui Hisami (Nagano JPX) Miyabara Ayako (Nagano JPX) Miyagawa Kiyotaka (Suzaka JPX) Imura Takayoshi (Nagano JPX, Process for manufacturing hollow multilayer printed wiring board.
  26. Grabbe Dimitry G. (Middletown PA) Korsunsky Iosif (Harrisburg PA) Ringler Daniel R. (Elizabethville PA), Surface mount electrical connector.

이 특허를 인용한 특허 (99)

  1. Hougham, Gareth; McVicker, Gerard; Gu, Xiaoxiong; Kang, Sung K.; Libsch, Frank R.; Liu, Xiao H., Axiocentric scrubbing land grid array contacts and methods for fabrication.
  2. Hougham, Gareth; McVicker, Gerard; Gu, Xiaoxiong; Kang, Sung K.; Libsch, Frank R.; Liu, Xiao H., Axiocentric scrubbing land grid array contacts and methods for fabrication.
  3. Hougham, Gareth; McVicker, Gerard; Gu, Xiaoxiong; Kang, Sung K.; Libsch, Frank R.; Liu, Xiao H., Axiocentric scrubbing land grid array contacts and methods for fabrication.
  4. Beroz Masud ; Haba Belgacem, Components with conductive solder mask layers.
  5. Beroz,Masud; Haba,Belgacem, Components with conductive solder mask layers.
  6. Peters, Michael G.; McCormack, Mark Thomas; Bernales, Aris, Composite interposer and method for producing a composite interposer.
  7. DiStefano Thomas H. ; Fjeslstad Joseph ; Smith John W., Connection component and method of making same.
  8. DiStefano,Thomas H.; Fjelstad,Joseph; Haba,Belgacem; Jamil,Owais; Karavakis,Konstantine; Light,David; Smith,John W., Connection component with peelable leads.
  9. Brown,Dirk D.; Williams,John D.; Radza,Eric M., Connector for making electrical contact at semiconductor scales.
  10. Dittmann,Larry E., Connector having staggered contact architecture for enhanced working range.
  11. Dittmann, Larry E., Contact and method for making same.
  12. Brown,Dirk D.; Williams,John D., Contact grid array formed on a printed circuit board.
  13. Williams,John D., Contact grid array system.
  14. Williams,John David, Contact grid array system.
  15. Dittmann,Larry E., Deep drawn electrical contacts and method for making.
  16. Belke, Jr., Robert Edward; Jairazbhoy, Vivek A.; Krautheim, Thomas B.; Quitty, Jr., William F., Electrical circuit board and a method for making the same.
  17. Belke, Jr.,Robert Edward; Jairazbhoy,Vivek A.; Krautheim,Thomas B.; Quitty, Jr.,William F., Electrical circuit board and a method for making the same.
  18. DiStefano, Thomas H.; Fjelstad, Joseph, Electrical connection with inwardly deformable contacts.
  19. Distefano Thomas H. ; Fjelstad Joseph, Electrical connection with inwardly deformable contacts.
  20. Distefano, Thomas H.; Fjelstad, Joseph, Electrical connection with inwardly deformable contacts.
  21. DiStefano Thomas H. ; Smith John W. ; Karavakis Konstantine N. ; Kovac Zlata ; Fjelstad Joseph, Electrical connections with deformable contacts.
  22. Light, David Noel; Kalakkad, Dinesh Sundararajan; Nguyen, Peter Tho, Electrical connector and method of making it.
  23. Dittmann, Larry E., Electrical connector having a flexible sheet and one or more conductive connectors.
  24. Light, David Noel; Wang, Hung-Ming; Baker, David Rodney; Nguyen, Peter Tho; Pao, Dexter Shih-Wei, Electrical connector with electrical contacts protected by a layer of compressible material and method of making it.
  25. McCollum, Gregory J.; Moriarity, Thomas C.; Olson, Kevin C.; Sandala, Michael G.; Wang, Alan E.; Wilson, Craig A.; Zawacky, Steven R., Electrodepositable dielectric coating compositions and methods related thereto.
  26. Dalton, Timothy J.; Petrarca, Kevin S.; Volant, Richard P., Encapsulated energy-dissipative fuse for integrated circuits and method of making the same.
  27. Khandros Igor Y. ; Eldridge Benjamin N. ; Mathieu Gaetan L., Fabricating interconnects and tips using sacrificial substrates.
  28. Godana, Ken; Erven, Dusty; Foreman, Kevin; Miller, Paul, Flexible electrical connector insert with conductive and non-conductive elastomers.
  29. Godana, Ken; Erven, Dusty; Foreman, Kevin; Miller, Paul, Flexible electrical connector insert with conductive and non-conductive elastomers.
  30. Smith John W. ; Haba Belgacem, Flexible lead structures and methods of making same.
  31. Smith, John W.; Haba, Belgacem, Flexible lead structures and methods of making same.
  32. Belgacem Haba, Forming microelectronic connection components by electrophoretic deposition.
  33. Dittmann,Larry E., Interposer and method for making same.
  34. Dittmann,Larry E., Interposer with compliant pins.
  35. Dittmann,Larry E., Interposer with compliant pins.
  36. Hougham, Gareth Geoffrey; Afzali, Ali; Cordes, Steven Allen; Coteus, Paul W.; Farinelli, Matthew J.; Goma, Sherif A.; Lanzetta, Alphonso P.; Morris, Daniel Peter; Rosner, Joanna; Yohannan, Nisha, Metalized elastomeric electrical contacts.
  37. Hall,Richard R.; Lin,How T.; Majka,Christopher J.; Seward,Matthew F.; Smith,Ronald V., Method and apparatus to establish circuit layers interconnections.
  38. Radza, Eric M.; Williams, John D., Method and system for batch forming spring elements in three dimensions.
  39. Brown, Dirk Dewar; Williams, John David; Long, William B.; Chen, Tingbao, Method and system for batch manufacturing of spring elements.
  40. Dittmann,Larry E., Method for fabricating a connector.
  41. Williams, John D., Method for fabricating a contact grid array.
  42. Haba, Belgacem, Method for forming a multi-layer circuit assembly.
  43. Haba,Belgacem, Method for forming a multi-layer circuit assembly.
  44. Brintzinger,Axel; Uhlendorf,Ingo, Method for forming three-dimensional structures on a substrate.
  45. DiStefano, Thomas H.; Fjelstad, Joseph, Method for making a microelectronic interposer.
  46. Neuman David, Method for manufacturing printed circuit board assembly.
  47. Lu You ; Steve Avanzino ; Fei Wang, Method for preventing damage of low-k dielectrics during patterning.
  48. Razon Eli ; Von Seggern Walter, Method of forming a chip scale package, and a tool used in forming the chip scale package.
  49. Hougham, Gareth Geoffrey; Afzali, Ali; Cordes, Steven Allen; Coteus, Paul W.; Farinelli, Matthew J.; Goma, Sherif A.; Lanzetta, Alphonso P.; Morris, Daniel Peter; Rosner, Joanna; Yohannan, Nisha, Method of forming metallized elastomeric electrical contacts.
  50. Wang,Alan E.; Olson,Kevin C.; Di Stefano,Thomas H., Method of making a circuit board.
  51. Thomas H. DiStefano ; Joseph Fjelstad ; Belgacem Haba ; Owais Jamil ; Konstantine Karavakis ; David Light ; John W. Smith, Method of making connection component.
  52. Williams, John D., Method of making electrical connector on a flexible carrier.
  53. Kawasaki,Yogo; Satake,Hiroaki; Iwata,Yutaka; Tanabe,Tetsuya, Method of manufacturing multi-layer printed circuit board.
  54. Miller, Thomas R.; Stanke, Duane A.; Testa, Robert J., Method of providing a printed circuit board with an edge connection portion.
  55. Blish ; II Richard C. ; Hatchard Colin ; Morgan Ian, Method to improve chip scale package electrostatic discharge performance and suppress marking artifacts.
  56. Chambers, Douglas C., Methods and apparatus for a flexible circuit interposer.
  57. Chambers,Douglas C, Methods and apparatus for a flexible circuit interposer.
  58. Masud Beroz, Methods of making a connection component using a removable layer.
  59. DiStefano Thomas H. ; Smith John W. ; Karavakis Konstantine N. ; Kovac Zlata ; Fjelstad Joseph, Methods of making microelectronic components having electrophoretically deposited layers.
  60. Geen, John A., Micro-machined device structures having on and off-axis orientations.
  61. Geen, John A., Micro-machined multi-sensor providing 1-axis of acceleration sensing and 2-axes of angular rate sensing.
  62. Geen, John A., Micro-machined multi-sensor providing 2-axes of acceleration sensing and 1-axis of angular rate sensing.
  63. Smith John W. ; Fjelstad Joseph, Microelectronic assembly fabrication with terminal formation from a conductive layer.
  64. Smith John W. ; Fjelstad Joseph, Microelectronic assembly fabrication with terminal formation from a conductive layer.
  65. Haba, Belgacem, Microelectronic connection components utilizing conductive cores and polymeric coatings.
  66. Eldridge, Benjamin N.; Grube, Gary W.; Khandros, Igor Y.; Mathieu, Gaetan L., Microelectronic contact structure.
  67. Eldridge, Benjamin N.; Grube, Gary W.; Khandros, Igor Y.; Mathieu, Gaetan L., Microelectronic contact structure and method of making same.
  68. Masud Beroz ; Joseph Fjelstad ; Belgacem Haba ; Christopher M. Pickett ; John Smith, Microelectronic unit forming methods and materials.
  69. Robert, Brian Joseph, Multi-component power structures and methods for forming the same.
  70. Olson, Kevin C.; Wang, Alan G., Multi-layer circuit assembly and process for preparing the same.
  71. Olson, Kevin C.; Wang, Alan G., Multi-layer circuit assembly and process for preparing the same.
  72. Sturni, Lance C.; Olson, Kevin C., Multi-layer circuit assembly and process for preparing the same.
  73. Kawasaki, Yogo; Satake, Hiroaki; Iwata, Yutaka; Tanabe, Tetsuya, Multi-layer printed circuit board and method of manufacturing multi-layer printed circuit board.
  74. Kawasaki, Yogo; Satake, Hiroaki; Iwata, Yutaka; Tanabe, Tetsuya, Multi-layer printed circuit board and method of manufacturing multi-layer printed circuit board.
  75. Kawasaki, Yogo; Satake, Hiroaki; Iwata, Yutaka; Tanabe, Tetsuya, Multi-layer printed circuit board and method of manufacturing multi-layer printed circuit board.
  76. Kawasaki, Yogo; Satake, Hiroaki; Iwata, Yutaka; Tanabe, Tetsuya, Multi-layer printed circuit board and method of manufacturing multi-layer printed circuit board.
  77. Shipley, Charles R.; Goldberg, Robert L.; Shelnut, James G., Multilayer circuit board manufacturing process.
  78. Cellarosi Mario J., Multilayer high density micro circuit module and method of manufacturing same.
  79. Cellarosi Mario J., Multilayer, high density micro circuit module and method of manufacturing same.
  80. Cotton, Martin A., Non-circular micro-via.
  81. Rathburn, James, Performance enhanced semiconductor socket.
  82. David Neuman, Printed circuit board assembly having adhesive joint.
  83. Lee, Seok-Kyu; Kang, Jang-Kyu; Jin, Hyun-Ju; Min, Byoung-Youl, Printed circuit board with embedded capacitors therein, and process for manufacturing the same.
  84. Lee,Seok Kyu; Kang,Jang Kyu; Jin,Hyun Ju; Min,Byoung Youl, Printed circuit board with embedded capacitors therein, and process for manufacturing the same.
  85. Eldridge, Benjamin N.; Grube, Gary W.; Khandros, Igor Y.; Mathieu, Gaetan L., Probe card assembly and kit, and methods of making same.
  86. Wang, Alan E.; Olson, Kevin C., Process for creating vias for circuit assemblies.
  87. Olson,Kevin C.; Wang,Alan E., Process for fabricating a multi layer circuit assembly.
  88. McCollum,Gregory J.; Moriarity,Thomas C.; Olson,Kevin C.; Sandala,Michael G.; Wang,Alan E.; Zawacky,Steven R., Process for fabricating circuit assemblies using electrodepositable dielectric coating compositions.
  89. Wimmer, Anton, Process for producing a contact-making device.
  90. Wen-chou Vincent Wang ; Michael G. Lee ; Solomon Beilin, Reduced stress and zero stress interposers for integrated-circuit chips, multichip substrates, and the like.
  91. Wang,Alan E.; Olson,Kevin C.; Di Stefano,Thomas H., Single or multi-layer printed circuit board with recessed or extended breakaway tabs and method of manufacture thereof.
  92. Geen, John A., Six degree-of-freedom micro-machined multi-sensor.
  93. Williams, John David; Radza, Eric Michael, Spring connector for making electrical contact at semiconductor scales.
  94. Brown, Dirk D.; Williams, John D.; Long, William B., Structure and process for a contact grid array formed in a circuitized substrate.
  95. Dittmann, Larry E.; Williams, John David; Long, William B., System and method for connecting flat flex cable with an integrated circuit, such as a camera module.
  96. Dittmann, Larry E.; Williams, John D.; Long, William B., System for connecting a camera module, or like device, using flat flex cables.
  97. Chen Shiaw-Jong S. ; Hooey Roger J. ; Radke Robert E., Through via plate electrical connector and method of manufacture thereof.
  98. Razon Eli ; Von Seggern Walter, Tool used in forming a chip scale package.
  99. Haba, Belgacem; Smith, John W., Vapor phase connection techniques.
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