초록 ▼

A digital computer system has an error correction code (ECC) syndrome encoder for generating initial ECC syndromes from digital words input to the system which are received together with their corresponding ECC syndromes, in the system receiving circuitry. The system has an ECC syndrome re-encoder f

A digital computer system has an error correction code (ECC) syndrome encoder for generating initial ECC syndromes from digital words input to the system which are received together with their corresponding ECC syndromes, in the system receiving circuitry. The system has an ECC syndrome re-encoder for generating second ECC syndromes from the digital words as they are removed from the receiving circuitry. A comparison circuit then compares the originally encoded syndrome with the re-encoded syndrome as it is being generated, to detect whether there is a difference and therefore an error in the digital word or an error in the syndrome. The comparison circuit is integrated into and is a part of the ECC re-encoder.

대표청구항 ▼

An error correction code (ECC) system for a computer system including an ECC syndrome encoder for generating an initial M-bit syndrome from each N-bit digital word for use in the computer, said ECC system comprising: receiving circuitry for receiving each N-bit digital word and its associated initia

An error correction code (ECC) system for a computer system including an ECC syndrome encoder for generating an initial M-bit syndrome from each N-bit digital word for use in the computer, said ECC system comprising: receiving circuitry for receiving each N-bit digital word and its associated initial ECC M-bit syndrome; and M syndrome bit generators each coupled to said receiving circuitry for combining a unique pattern of less than N bits from the N-bit digital words from the receiving circuitry with a unique pattern of less than M bits from the initial M-bit syndromes, with each of the N bits providing an input to a plurality of less than M syndrome bit generators, each generator providing a corresponding error bit of an error code.