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Vacuum process apparatus and vacuum processing method 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • B65G-049/07
출원번호 US-0582805 (1996-01-04)
우선권정보 JP-0120502 (1993-04-23); JP-0287543 (1993-10-22); JP-0287544 (1993-10-22); JP-0287545 (1993-10-22)
발명자 / 주소
  • Fukasawa Yoshio (Kofu JPX) Hosoda Shozo (Yamanashi-ken JPX) Nakagome Tatsuya (Yamanashi-ken JPX) Tozawa Takashi (Yamanashi-ken JPX) Suzuki Koji (Yamanashi-ken JPX) Ishihara Yasumasa (Kofu JPX) Aoyagi
출원인 / 주소
  • Tokyo Electron Limited (Tokyo JPX 03) Tokyo Electron Yamanashi Limited (Nirasaki JPX 03)
인용정보 피인용 횟수 : 66  인용 특허 : 18

초록

A vacuum process apparatus includes a convey chamber having a plurality of loading/unloading ports and an airtight structure kept in a vacuum when a target object is conveyed, at least one preliminary vacuum chamber connected to the convey chamber through a loading/unloading port, a plurality of vac

대표청구항

A vacuum process apparatus comprising: a convey chamber having a plurality of loading/unloading ports and an airtight structure kept in a vacuum when a target object is conveyed; at least one preliminary vacuum chamber connected to said convey chamber through one of said plurality of loading/unloadi

이 특허에 인용된 특허 (18)

  1. Akimoto Masami (Kumamoto JPX) Yoshioka Kazutoshi (Kumamoto JPX) Iida Naruaki (Kumamoto JPX), Apparatus for processing wafer-shaped substrates.
  2. Boys Donald R. (Cupertino CA) Graves Walter E. (San Jose CA), Disk or wafer handling and coating system.
  3. Kato Naoki (Yamato JPX) Konoshima Eiji (Zama JPX) Kinokiri Kyoji (Tokyo JPX) Ikeda Jiro (Fujieda JPX), Loading apparatus having a suction-hold mechanism.
  4. Nakagawa Yoshinori (Numazu JPX) Mitani Shinichi (Numazu JPX) Kobayashi Takehiko (Mishima JPX) Honda Takaaki (Yokohama JPX), Method for multichamber sheet-after-sheet type treatment.
  5. Zajac John (San Jose CA) Mirkovich Ninko T. (Novato CA) Rathmann Thomas M. (Rohnert Park CA) Lachenbruch Roger B. (Petaluma CA), Modular article processing machine and method of article handling therein.
  6. Rubin Richard H. (Fairfield NJ) Petrone Benjamin J. (Netcong NJ) Heim Richard C. (Mountain View CA) Pawenski Scott M. (Wappingers Falls NY), Modular processing apparatus for processing semiconductor wafers.
  7. Maydan Dan (Los Altos Hills CA) Somekh Sasson (Redwood City CA) Wang David N. (Cupertino CA) Cheng David (San Jose CA) Toshima Masato (San Jose CA) Harari Isaac (Mountain View CA) Hoppe Peter D. (Sun, Multi-chamber integrated process system.
  8. Genov Genco (Sunnyvale CA) Skrobak Lubomir (Sunnyvale CA) Kremerman Izya (San Francisco CA) Kielczewski Grzegorz (San Bruno CA), Precision arm mechanism.
  9. Usami Yasutsugu (Katsuta JPX), Process and apparatus for transferring an object and for processing semiconductor wafers.
  10. Tateyama Kiyohisa (Kumamoto) Akimoto Masami (Kumamoto) Ushijima Mitsuru (Tama JPX), Resist process system.
  11. Poduje Noel S. (Needham Heights MA) Mallory Roy S. (Bedford MA), Robot prealigner.
  12. Tepman Avi (Cupertino CA) Grunes Howard (Santa Cruz CA) Somekh Sasson (Los Altos Hills CA) Maydan Dan (Los Altos Hills CA), Staged-vacuum wafer processing system and method.
  13. Crabb Richard (Mesa AZ) Robinson McDonald (Paradise Valley AZ) Hawkins Mark R. (Mesa AZ) Goodwin Dennis L. (Tempe AZ) Ferro Armand P. (Scottsdale AZ), Substrate handling and transporting apparatus.
  14. Yoshioka Kazutoshi (Kamoto JPX) Yokomizo Kenji (Kumamoto JPX) Akimoto Masami (Kumamoto JPX) Yoshimoto Yuji (Kikuchi JPX), Transportation-transfer device for an object of treatment.
  15. Hiroki Tutomu (Yamanashi JPX), Vacuum processing apparatus.
  16. Takanabe Eiichiro (Sagamihara JPX) Suzuki Takeo (Iruma JPX) Noguchi Tadataka (Kitakyushu JPX), Vertical heat-treating apparatus and heat-treating process by using the vertical heat-treating apparatus.
  17. Sato Mitsuya (Yokohama JPX) Imai Shunzo (Yamato JPX) Hiraga Ryozo (Kanaga JPX), Wafer handling apparatus and method.
  18. Goodwin Dennis L. (Tempe AZ) Crabb Richard (Mesa AZ) Robinson McDonald (Paradise Valley AZ) Ferro Armand P. (Scottsdale AZ), Wafer handling system with bernoulli pick-up.

이 특허를 인용한 특허 (66)

  1. Schauer, Ronald Vern; Lappen, Alan Rick, Apparatus for alignment of automated workpiece handling systems.
  2. Bernard, Roland; Chevalier, Eric; Sogan, Gloria, Apparatus for conditioning the atmosphere in a vacuum chamber.
  3. Nishinakayama, Yasuhiko; Ishizawa, Shigeru; Saeki, Hiroaki; Kawano, Takashi; Osawa, Tetsu, Carrier system positioning method.
  4. Lei Lawrence Chung-Lai ; Trinh Son, Chamber design for modular manufacturing and flexible onsite servicing.
  5. Zhang, Tao, Charged particle beam system.
  6. Pharand, Michel; Becker, Klaus; Petry, Klaus; LaFontaine, Marvin R.; Mitrano, Michael R., Combination load lock for handling workpieces.
  7. Hofmeister, Christopher; Krupyshev, Alexander; Gilchrist, Ulysses, Compact substrate transport system.
  8. Hofmeister, Christopher; Krupyshev, Alexander; Gilchrist, Ulysses, Compact substrate transport system.
  9. Lee,Jae Chull; Berkstresser,David, Curved slit valve door with flexible coupling.
  10. Lee, Jae-Chull; Kurita, Shinichi; White, John M.; Anwar, Suhail, Decoupled chamber body.
  11. Danny Kenny ; Keith Lindberg, Differential process control method.
  12. Kurita, Shinichi; Blonigan, Wendell T., Double dual slot load lock chamber.
  13. Kurita, Shinichi; Blonigan, Wendell T.; Hosokawa, Akihiro, Dual substrate loadlock process equipment.
  14. Kurita, Shinichi; Blonigan, Wendell T.; Hosokawa, Akihiro, Dual substrate loadlock process equipment.
  15. Nakamura, Hiroaki; Takaoka, Toshiyuki; Takemoto, Yoshikatsu, EFEM.
  16. White, Carl L.; Shero, Eric; Reed, Joe, Gap maintenance for opening to process chamber.
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  18. Kurita,Shinichi; Blonigan,Wendell T.; Tanase,Yoshiaki, Load lock chamber for large area substrate processing system.
  19. Kurita,Shinichi; Blonigan,Wendell T., Load lock chamber having two dual slot regions.
  20. Lee, Jae-Chull; Anwar, Suhail; Kurita, Shinichi, Load lock chamber with decoupled slit valve door seal compartment.
  21. Hasan,Talat Fatima, Measurement system cluster.
  22. Hasan,Talat Fatima, Measurement system cluster.
  23. Schauer,Ronald Vern; Lappen,Alan Rick; Tuttle,David L., Method and apparatus for aligning a cassette.
  24. Reed, Joseph C; Shero, Eric J, Method and apparatus for minimizing contamination in semiconductor processing chamber.
  25. Sunagawa, Yoshitaka; Hayashi, Yoshitake; Koyama, Masayoshi; Tomura, Yoshihiro; Kojima, Toshiyuki; Shibata, Osamu; Saito, Ryuichi, Method for fabricating semiconductor-mounting body and apparatus for fabricating semiconductor-mounting body.
  26. Reed, Joseph C.; Shero, Eric J., Method for minimizing contamination in semiconductor processing chamber.
  27. Ishizawa Shigeru,JPX ; Ogi Tatsuya,JPX ; Mochizuki Hiroaki,JPX, Method for recovering object to be treated after interruption.
  28. Kurita,Shinichi; Blonigan,Wendell T., Method for transferring substrates in a load lock chamber.
  29. Holcomb,Garry; Gu,Youfan; Stafford,James; Mueller,James M.; Wade,Stacy, Method of using a combination differential and absolute pressure transducer for controlling a load lock.
  30. Kawahara, Jun; Haukka, Suvi; Niskanen, Antti; Tois, Eva; Matero, Raija; Suemori, Hidemi; Anttila, Jaako; Mori, Yukihiro, Methods for thin film deposition.
  31. Leveen Lindsay, Microelectronic component fabrication facility, and process for making and using the facility.
  32. Kidd,Jerry D.; Harrington,Craig D.; Hopkins,Daniel N., Mobile plating system and method.
  33. Bright Nick ; Mooring Ben, Modular architecture for semiconductor wafer fabrication equipment.
  34. Asakawa Teruo,JPX ; Saeki Hiroaki,JPX, Multi-chamber treatment system.
  35. Fairbairn Kevin ; Sinha Ashok, Multideck wafer processing system.
  36. Heyder Roger V. ; Brezocsky Thomas B. ; Davenport Robert E., Multiple loadlock system.
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  38. Kurita, Shinichi; Anwar, Suhail; Lee, Jae-Chull, Multiple slot load lock chamber and method of operation.
  39. Emoto, Keiji, PIPE STRUCTURE, ALIGNMENT APPARATUS, ELECTRON BEAM LITHOGRAPHY APPARATUS, EXPOSURE APPARATUS, EXPOSURE APPARATUS MAINTENANCE METHOD, SEMICONDUCTOR DEVICE MANUFACTURING METHOD, AND SEMICONDUCTOR MANUF.
  40. Narita Masaki,JPX ; Yoshida Yukimasa,JPX ; Hattori Kei,JPX ; Okumura Katsuya,JPX, Plasma processing apparatus and method.
  41. Fairbairn Kevin ; Ponnekanti Hari K., Process chamber exhaust system.
  42. Sugiyama, Toru; Nakano, Ryu, Purge step-controlled sequence of processing semiconductor wafers.
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  53. Edo, Ryo, Substrate processing system with load-lock chamber.
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  57. Jang, Sung-Ho; Kang, Byung-Man, Substrate treating apparatus and method of manufacturing the same.
  58. Kidd,Jerry D.; Harrington,Craig D.; Hopkins,Daniel N., System and method for plasma plating.
  59. Hasan,Talat Fatima, Systems and methods for metrology recipe and model generation.
  60. Kremerman, Izya; Hudgens, Jeffrey C., Systems, apparatus and methods for transporting substrates in electronic device manufacturing.
  61. Fairbairn, Kevin; Barzilai, Jessica; Ponnekanti, Hari K.; Taylor, W. N. (Nick), Tandem process chamber.
  62. Masayuki Toda JP; Tadahiro Ohmi JP; Yoshio Ishihara JP, Transportation method for substrate wafers and transportation apparatus.
  63. Caveney, Robert T.; Martin, David; Gilchrist, Ulysses, Unequal link SCARA arm.
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  65. Ashizawa, Kengo, Vacuum processing system.
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