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A method and system for selectively defining hardware parameters in an executable operating system program provides the advantage of enabling or disabling hardware features during testing without having to modify and recompile the operating system source program. In an implementation of a preferred

A method and system for selectively defining hardware parameters in an executable operating system program provides the advantage of enabling or disabling hardware features during testing without having to modify and recompile the operating system source program. In an implementation of a preferred embodiment, a hardware control variable is stored in a configuration file in memory. The configuration file is accessible to the user to define or modify the hardware control variable as desired. The hardware control variable contains a number of hardware control bits, each corresponding to a hardware parameter in the executable operating system program. During execution, the executable operating system program defines the hardware parameters based on the values of the corresponding hardware control bits. The executable operating system program enables or disables the hardware features based on how the hardware parameters are defined.

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A method of selectively defining a hardware parameter in an executable operating system program, the method performed by a computer system having a processor and a memory storing the executable operating system program, and the method comprising the steps of: storing in the memory a configuration fi

A method of selectively defining a hardware parameter in an executable operating system program, the method performed by a computer system having a processor and a memory storing the executable operating system program, and the method comprising the steps of: storing in the memory a configuration file including a hardware control variable comprising the following hardware control bits: an instruction cache enable bit indicating whether an instruction cache is enabled, a target instruction cache enable bit indicating whether a target instruction cache in the processor is enabled, a branch prediction enable bit indicating whether a branch prediction function is enabled, a double instruction issue enable bit indicating whether a double instruction issue in the processor is enabled, a data cache enable bit indicating whether a data cache in the processor is enabled, a force write-through bit indicating whether a force write-through function in the data cache in the processor is enabled, a snoop enable bit indicating whether a snooping function in the data cache in the processor is enabled, a cache inhibit instruction pages bit indicating whether all instruction pages are cache inhibited, a cache inhibit data pages bit indicating whether data space pages are cache inhibited, a write-through mode bit indicating whether the executable operating system places all data pages in a write-through mode, a software table walk enable bit indicating whether a software table walk function is enabled, a decoupled cache enable bit indicating whether a decoupled cache in the processor is enable, an only off board memory bit indicating whether the executable operating system program will map only portions of the memory which are not provided on a main board, a nested interrupt enable bit indicating whether the executable operating system program will allow interrupts to be nested, a window interrupt enable bit indicating whether the executable operating system will delay interrupts for a determined window of time, and a data matching disable bit indicating whether the processor will be enabled to read values loaded in a previous cycle; obtaining from a user a value corresponding to a definition of a hardware parameter represented by at least one of the hardware control bits; storing in the memory the hardware control variable indicating the value corresponding to the definition of the hardware parameter; and executing the executable operating system program, the executable operating system program defining the hardware parameter during execution based on the value indicated by the hardware control variable.