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[미국특허] Integrity protection for parity calculation for raid parity cache 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-011/00
출원번호 US-0388931 (1995-02-15)
발명자 / 주소
  • Duffy Darrell (Sunnyvale CA)
출원인 / 주소
  • MTI Technology Corporation (Anaheim CA 02)
인용정보 피인용 횟수 : 45  인용 특허 : 3

초록

An improvement on the use of parity and a write cache for a RAID by adding a check code for the parity data itself. In addition, the time during which the parity check code is unprotected is reduced by using a single loop to calculate the old parity check code and verify it, determine the new parity

대표청구항

In a disk controller for a RAID arrangement of disk drives, the disk controller having a write cache, a method for calculating parity comprising the steps of: (a) fetching an old block of data, a new block of data, and an old block of parity; (b) computing a partial check code on said old block of p

이 특허에 인용된 특허 (3) 인용/피인용 타임라인 분석

  1. Brady James T. (San Jose CA), Memory controller with parity generator for an I/O control unit.
  2. Irvin David R. (Raleigh NC) Sy Kian-Bon (Cary NC), Preservation of CRC integrity upon intentional data alteration during message transmission.
  3. Fuller William T. (San Jose CA), Redundant array parity caching system.

이 특허를 인용한 특허 (45) 인용/피인용 타임라인 분석

  1. Yang,Ken Q.; Zhang,Ming; Yinan,Liu, Adaptive cache engine for storage area network including systems and methods related thereto.
  2. Benhase,Michael Thomas; Palmer,Michael John; Verdoorn, Jr.,William Garrett; Walls,Andrew Dale, Apparatus, system, and method for error checking and recovery of transmitted data in a SCSI environment.
  3. Benhase, Michael Thomas; Palmer, Michael John; Verdoorn, Jr., William Garrett; Walls, Andrew Dale, Apparatus, system, and method for mandatory end to end integrity checking in a storage system.
  4. Yang,Ken Qing; Di Pippo,John, Data replication method over a limited bandwidth network by mirroring parities.
  5. Komarla, Eshwari P.; Zimmer, Vincent J.; Bulusu, Mallik, Data security.
  6. Komarla, Eshwari P.; Zimmer, Vincent J.; Bulusu, Mallik, Data security.
  7. Zimmer, Vincent J.; Rothman, Michael A., Data security.
  8. Zimmer, Vincent J.; Rothman, Michael A., Data security.
  9. Zimmer, Vincent J.; Rothman, Michael A., Data security.
  10. Peterson Gary S., Data validation system for a group of data storage disks.
  11. Vishlitzky,Natan; Kopylovitz,Haim, Digital data storage subsystem including directory for efficiently providing formatting information for stopped records and utilization of a check value for verifying that a record is from a particul.
  12. Chikusa,Takashi; Morita,Seiki; Tachibana,Toshio; Maki,Takehiro; Honma,Hirotaka, Disk array system.
  13. Tamura Takayuki,JPX ; Shiota Shigemasa,JPX ; Katayama Kunihiro,JPX ; Naito Masashi,JPX, External storage device and memory access control method thereof.
  14. Tamura Takayuki,JPX ; Shiota Shigemasa,JPX ; Katayama Kunihiro,JPX ; Naito Masashi,JPX, External storage device and memory access control method thereof.
  15. Tamura, Takayuki; Shiota, Shigemasa; Katayama, Kunihiro; Naito, Masashi, External storage device and memory access control method thereof.
  16. Tamura, Takayuki; Shiota, Shigemasa; Katayama, Kunihiro; Naito, Masashi, External storage device and memory access control method thereof.
  17. Tamura, Takayuki; Shiota, Shigemasa; Katayama, Kunihiro; Naito, Masashi, External storage device and memory access control method thereof.
  18. Tamura,Takayuki; Shiota,Shigemasa; Katayama,Kunihiro; Naito,Masashi, External storage device and memory access control method thereof.
  19. Nomura, Shimpei; Suzuki, Akifumi; Okada, Mitsuhiro; Morishita, Satoshi, Information processing system, storage apparatus and storage device.
  20. Lee, Hae-Seung, Memory system for improving data input/output performance and method of caching data recovery information.
  21. Schmisseur, Mark A.; Radhakrishnan, Sivakumar; Kumar, Pankaj; Goldschmidt, Marc A.; Molnar, Peter, Method and apparatus for increasing data reliability for raid operations.
  22. Bert, Luca, Method and apparatus for protecting the integrity of cached data in a direct-attached storage (DAS) system.
  23. Rodney A. DeKoning ; Bret S. Weber, Method and apparatus for providing centralized intelligent cache between multiple data controlling elements.
  24. Cronch,Robert, Method and apparatus to improve magnetic disc drive reliability using excess un-utilized capacity.
  25. Litwin Witold,FRX ; Menon Jaishankar Moothedath ; Risch Tore Johan Martin,SEX, Method and system for data recovery using a distributed and scalable data structure.
  26. Ng Chan Yiu ; Chen James C. ; Lanzi Charles Richard, Method and system for detection and reconstruction of corrupted data in a data storage subsystem.
  27. DeKoning Rodney A., Method for accelerating disk array write operations using segmented cache memory and data logging.
  28. Arataki,Nina; Ohyama,Sadayuki, Method of writing data and channel adapter.
  29. Katayama, Kunihiro; Tamura, Takayuki; Watatani, Satoshi; Inoue, Kiyoshi; Shiota, Shigemasa; Naito, Masashi, Nonvolatile memory with faulty cell registration.
  30. Shimizume,Kazutoshi; Akita,Mamoru; Itoh,Masahiko, Semiconductor memory device and signal processing system.
  31. Katayama, Kunihiro; Tamura, Takayuki; Watatani, Satoshi; Inoue, Kiyoshi; Shiota, Shigemasa; Naito, Masashi, Semiconductor memory device having faulty cells.
  32. Katayama, Kunihiro; Tamura, Takayuki; Watatani, Satoshi; Inoue, Kiyoshi; Shiota, Shigemasa; Naito, Masashi, Semiconductor memory device having faulty cells.
  33. Katayama, Kunihiro; Tamura, Takayuki; Watatani, Satoshi; Inoue, Kiyoshi; Shiota, Shigemasa; Naito, Masashi, Semiconductor memory device having faulty cells.
  34. Katayama, Kunihiro; Tamura, Takayuki; Watatani, Satoshi; Inoue, Kiyoshi; Shiota, Shigemasa; Naito, Masashi, Semiconductor memory device having faulty cells.
  35. Katayama, Kunihiro; Tamura, Takayuki; Watatani, Satoshi; Inoue, Kiyoshi; Shiota, Shigemasa; Naito, Masashi, Semiconductor memory device having faulty cells.
  36. Kunihiro Katayama JP; Takayuki Tamura JP; Satoshi Watatani JP; Kiyoshi Inoue JP; Shigemasa Shiota JP; Masashi Naito JP, Semiconductor memory device having faulty cells.
  37. Shimizume, Kazutoshi; Akita, Mamoru; Itoh, Masahiko, Semiconductor memory system and signal processing system.
  38. Fava Thomas F. ; Keith Joseph M. ; Fuller Randy R., Simultaneous, mirror write cache.
  39. Ogihara,Kazutaka; Tamura,Masahisa, Storage management process, storage management apparatus, and computer-readable medium storing storage management program.
  40. Shibayama, Tsukasa; Okada, Wataru; Sakashita, Yukinori; Hiraiwa, Yuri; Sato, Masahide, Storage system and storage system data migration method.
  41. Shibayama, Tsukasa; Okada, Wataru; Sakashita, Yukinori; Hiraiwa, Yuri; Sato, Masahide, Storage system and storage system data migration method.
  42. Cherian, Jacob; Nguyen, Nam V., System and method for handling write commands to prevent corrupted parity information in a storage array.
  43. Weirauch, Charles R.; Nijboer, Jakob Gerrit; Steenbergen, Christiaan, System and method for writing data and a time value to an addressable unit of a removable storage medium.
  44. Litwin Witold,FRX ; Menon Jaishankar Moothedath ; Risch Tore Johan Martin,SEX, System for scalable distributed data structure having scalable availability.
  45. Archibald, Jr., John Edward; McKean, Brian Dennis, System, method, and computer program for selectable or programmable data consistency checking methodology.

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