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Plastic-encapsulated semiconductor device 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/29
출원번호 US-0305478 (1994-09-13)
우선권정보 JP-0229064 (1993-09-14); JP-0329199 (1993-12-27); JP-0094442 (1994-05-06)
발명자 / 주소
  • Ohta Hideo (Tokyo JPX) Okuyama Tetsuo (Yokohama JPX) Fujieda Shinetsu (Kawasaki JPX) Kajiura Sadao (Kanagawa-ken JPX) Yoshizumi Akira (Yokohama JPX)
출원인 / 주소
  • Kabushiki Kaisha Toshiba (Kanagawa-ken JPX 03)
인용정보 피인용 횟수 : 306  인용 특허 : 0

초록 ▼

A semiconductor chip is positioned between encapsulating sheets. The encapsulating sheets each have a surface that is highly adhesive and a surface that is less adhesive. The surface of the encapsulating sheet that is highly adhesive contacts the chip. The surface that is less adhesive contacts a mo

대표청구항 ▼

A resin-encapsulated semiconductor device comprising: an encapsulating sheet on a semiconductor chip, the encapsulating sheet being initially comprised of an uncured resin sheet, and a distribution of a resin composition additive between one surface of the encapsulating sheet contacting the semicond

이 특허를 인용한 특허 (306)

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  175. Lin, Mou-Shiung; Lee, Jin-Yuan, Post passivation interconnection schemes on top of IC chip.
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  184. Paek, Jong Sik, Reduced size semiconductor package with stacked dies.
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  185. Kim, Bong Chan; Na, Jae Young; Song, Jae Kyu, Reduced size stacked semiconductor package and method of making the same.
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  186. Tzu, Chung-Hsing; Shih, Jun-Chun; Chen, Kuang-Yang; Tan, Kuo-Chang; Ho, Hsi-Hsun; Liao, June-Wen; Wang, Ching-Huai, Reinforced die pad support structure.
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  187. Miks, Jeffrey Alan; Miranda, John Armando, Reinforced lead-frame assembly for interconnecting circuits within a circuit module.
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  188. Hayashi,Toshiaki; Furuta,Katsuhiro, Resin film and multilayer printed wiring board using thereof.
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  189. Ozaki, Takayoshi; Ishikawa, Tomomi; Takahashi, Toru, Rotation detector, wheel bearing equipped therewith and process for manufacturing the same.
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  190. Hu, Tom; Davis, Terry W.; Bancod, Ludovico E.; Shin, Won Dai, Saw and etch singulation method for a chip package.
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  191. Mclellan Neil,HKX ; Fan Nelson,HKX, Saw-singulated leadless plastic chip carrier.
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  192. Mclellan Neil,HKX ; Fan Nelson,HKX, Saw-singulated leadless plastic chip carrier.
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  193. Hotta Yuji,JPX, Sealing label for sealing semiconductor element.
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  195. Toyosawa Kenji,JPX ; Ohsono Mitsuaki,JPX, Semiconductor device and film carrier tape and respective manufacturing methods thereof.
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  198. Do, Won Chul; Ko, Yong Jae, Semiconductor device comprising a conductive pad on a protruding-through electrode.
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  199. Ishikawa Takae,JPX ; Mine Katsutoshi,JPX ; Naito Hiroyosi,JPX ; Yamakawa Kimio,JPX, Semiconductor device having a cured silicone coating with non uniformly dispersed filler.
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  200. Iida, Atsuko; Onozuka, Yutaka; Itaya, Kazuhiko, Semiconductor device having an adhesive portion with a stacked structure and method for manufacturing the same.
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  201. Teshima, Takanori, Semiconductor device having heat conducting plate.
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  202. Fukuda,Yutaka; Nomura,Kazuhito; Nakase,Yoshimi, Semiconductor device having radiation structure.
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  203. Mamitsu, Kuniaki; Hirai, Yasuyoshi, Semiconductor device having radiation structure.
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  204. Mamitsu, Kuniaki; Hirai, Yasuyoshi, Semiconductor device having radiation structure.
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  205. Mamitsu, Kuniaki; Hirai, Yasuyoshi, Semiconductor device having radiation structure.
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  206. Mamitsu, Kuniaki; Hirai, Yasuyoshi, Semiconductor device having radiation structure.
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  207. Mamitsu, Kuniaki; Hirai, Yasuyoshi; Nomura, Kazuhito; Fukuda, Yutaka; Kajimoto, Kazuo; Miyajima, Takeshi; Makino, Tomoatsu; Nakase, Yoshimi, Semiconductor device having radiation structure.
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  208. Mamitsu,Kuniaki; Hirai,Yasuyoshi, Semiconductor device having radiation structure.
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  209. Teshima, Takanori; Fukuda, Yutaka; Nakase, Yoshimi; Mamitsu, Kuniaki; Makino, Tomoatsu, Semiconductor device having radiation structure and method for manufacturing semiconductor device having radiation structure.
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  210. Do, Won Chul; Jung, Yeon Seung; Ko, Yong Jae, Semiconductor device having through electrodes protruding from dielectric layer.
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  211. Kim, Gwang Ho; Kim, Jin Seong; Park, Dong Joo; Kang, Dae Byoung, Semiconductor device including increased capacity leadframe.
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  212. Kim, Gi Jeong; Choi, Yeon Ho, Semiconductor device including leadframe having power bars and increased I/O.
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  213. Kim, Gi Jeong; Choi, Yeon Ho, Semiconductor device including leadframe having power bars and increased I/O.
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  214. Bae, Jae Min; Kim, Byong Jin; Bang, Won Bae, Semiconductor device including leadframe with a combination of leads and lands.
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  215. Bae, Jae Min; Kim, Byong Jin; Bang, Won Bae, Semiconductor device including leadframe with a combination of leads and lands and method.
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  216. Bae, Jae Min; Kim, Byong Jin; Bang, Won Bae, Semiconductor device including leadframe with a combination of leads and lands and method.
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  217. Bae, Jae Min; Kim, Byong Jin; Bang, Won Bae, Semiconductor device including leadframe with a combination of leads and lands and method.
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  218. Bae, Jae Min; Kim, Byong Jin; Bang, Won Bae, Semiconductor device including leadframe with a combination of leads and lands and method.
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  219. Choi, Yeon Ho; Kim, GiJeong; Kim, WanJong, Semiconductor device including leadframe with increased I/O.
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  220. Choi, Yeon Ho; Kim, GiJeong; Kim, WanJong, Semiconductor device including leadframe with increased I/O.
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  221. Kim, Gi Jeong; Kim, Wan Jong, Semiconductor device with increased I/O leadframe.
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  222. Kim, Gi Jeong; Kim, Wan Jong, Semiconductor device with increased I/O leadframe.
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  223. Kim, Wan Jong; Do, Young Tak; Cho, Byong Woo, Semiconductor device with increased I/O leadframe including power bars.
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  224. Kim, Hong Bae; Kim, Hyun Jun; Chung, Hyung Kook, Semiconductor device with leadframe configured to facilitate reduced burr formation.
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  225. Kim, Hyun Jun; Chung, Hyung Kook; Kim, Hong Bae, Semiconductor device with leadframe configured to facilitate reduced burr formation.
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  226. Ogino,Masahiko; Ueno,Takumi; Eguchi,Shuji; Nagai,Akira; Satoh,Toshiya; Ishii,Toshiaki; Kokaku,Hiroyoshi; Segawa,Tadanori; Tsuyuno,Nobutake; Nishimura,Asao; Anjoh,Ichiro, Semiconductor device, semiconductor wafer, semiconductor module, and a method of manufacturing semiconductor device.
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  227. Kiso, Shigeo; Kataoka, Ichiro; Yamada, Satoru; Shiotsuka, Hidenori; Zenko, Hideaki, Semiconductor encapsulant resin having an additive with a gradient concentration.
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  228. Seo, Seong Min; Chung, Young Suk; Paek, Jong Sik; Ku, Jae Hun; Yee, Jae Hak, Semiconductor package.
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  229. Seo, Seong Min; Chung, Young Suk; Paek, Jong Sik; Ku, Jae Hun; Yee, Jae Hak, Semiconductor package.
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  230. Kim,Do Hyung; Jeon,Hyung Il; Park,Doo Hyun, Semiconductor package and its manufacturing method.
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  233. Jae Hak Yee KR; Young Suk Chung KR; Jae Jin Lee KR; Terry Davis ; Chung Suk Han KR; Jae Hun Ku KR; Jae Sung Kwak KR; Sang Hyun Ryu KR, Semiconductor package and method of making using leadframe having lead locks to secure leads to encapsulant.
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  234. Yee, Jae Hak; Chung, Young Suk; Lee, Jae Jin; Davis, Terry; Han, Chung Suk; Ku, Jae Hun; Kwak, Jae Sung; Ryu, Sang Hyun, Semiconductor package and method of making using leadframe having lead locks to secure leads to encapsulant.
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  235. Yee, Jae Hak; Chung, Young Suk; Lee, Jae Jin; Davis, Terry; Han, Chung Suk; Ku, Jae Hun; Kwak, Jae Sung; Ryu, Sang Hyun, Semiconductor package and method of making using leadframe having lead locks to secure leads to encapsulant.
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  236. Jeon, Hyung Il; Chung, Ji Young; Kim, Byong Jin; Park, In Bae; Bae, Jae Min; Park, No Sun, Semiconductor package and method therefor.
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  237. Jeon, Hyung Il; Chung, Ji Young; Kim, Byong Jin; Park, In Bae; Bae, Jae Min; Park, No Sun, Semiconductor package and method therefor.
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  238. Lee, Sun Goo; Jang, Sang Jae; Lee, Choon Heung; Yoshida, Akito, Semiconductor package capable of die stacking.
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  239. Lee, Sun Goo; Lee, Choon Heung; Lee, Sang Ho, Semiconductor package exhibiting efficient lead placement.
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  240. Jang, Sung Sik, Semiconductor package having improved adhesiveness and ground bonding.
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  241. Jang,Sung Sik, Semiconductor package having improved adhesiveness and ground bonding.
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  242. Smith, Lee J., Semiconductor package having leadframe with exposed anchor pads.
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  243. Smith, Lee J., Semiconductor package having leadframe with exposed anchor pads.
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  245. Lee,Tae Heon; Seo,Mu Hwan, Semiconductor package having reduced thickness.
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  247. Paek,Jong Sik, Semiconductor package including flip chip.
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  248. Foster, Donald Craig, Semiconductor package including isolated ring structure.
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  249. Lee,Seung Ju; Do,Won Chul; Lee,Kwang Eung, Semiconductor package including leads and conductive posts for providing increased functionality.
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  250. Yang, Jun Young; Lee, Sun Goo; Lee, Choon Heung, Semiconductor package including low temperature co-fired ceramic substrate.
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  251. Miks, Jeffrey Alan, Semiconductor package including ring structure connected to leads with vertically downset inner ends.
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  252. Seo, Seong Min; Chung, Young Suk; Paek, Jong Sik; Ku, Jae Hun; Yee, Jae Hak, Semiconductor package including stacked chips with aligned input/output pads.
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  253. Yang,Sung Jin; Ha,Sun Ho; Kim,Ki Ho; Son,Sun Jin, Semiconductor package with chamfered corners and method of manufacturing the same.
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  254. Perez, Erasmo; Roman, David T., Semiconductor package with exposed die pad and body-locking leadframe.
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  255. Perez, Erasmo; Roman, David T., Semiconductor package with exposed die pad and body-locking leadframe.
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  256. St. Amand, Roger D.; Perelman, Vladimir, Semiconductor package with fast power-up cycle and method of making same.
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  259. Park, Doo Hyun; Kim, Jae Yoon; Jung, Yoon Ha, Semiconductor package with increased I/O density and method of making the same.
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  260. Lee, Choon Heung; Foster, Donald C.; Choi, Jeoung Kyu; Kim, Wan Jong; Youn, Kyong Hoon; Lee, Sang Ho; Lee, Sun Goo, Semiconductor package with increased number of input and output pins.
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  261. Lee,Choon Heung; Foster,Donald C.; Choi,Jeoung Kyu; Kim,Wan Jong; Youn,Kyong Hoon; Lee,Sang Ho; Lee,Sun Goo, Semiconductor package with increased number of input and output pins.
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  262. Jeong, Jung Ho; Hong, Jong Chul; Kim, Eun Deok, Semiconductor package with optimized leadframe bonding strength.
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  263. Kim, Do Hyeong; Kim, Bong Chan; Kim, Yoon Joo; Chung, Ji Young, Semiconductor package with patterning layer and method of making same.
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  266. Choi, Yeon Ho, Side leaded, bottom exposed pad and bottom exposed lead fusion quad flat semiconductor package.
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  267. Choi, Yeon Ho, Side leaded, bottom exposed pad and bottom exposed lead fusion quad flat semiconductor package.
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  268. Suehiro, Yoshinobu; Inoue, Mitsuhiro; Kato, Hideaki; Hadame, Kunihiro; Tohmon, Ryoichi; Wada, Satoshi; Ota, Koichi; Aida, Kazuya; Watanabe, Hiroki; Yamamoto, Yoshinori; Ohtsuka, Masaaki; Sawanobori, Naruhito, Solid element device and method for manufacturing the same.
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  269. Suehiro, Yoshinobu; Inoue, Mitsuhiro; Kato, Hideaki; Hadame, Kunihiro; Tohmon, Ryoichi; Wada, Satoshi; Ota, Koichi; Aida, Kazuya; Watanabe, Hiroki; Yamamoto, Yoshinori; Ohtsuka, Masaaki; Sawanobori, Naruhito, Solid element device and method for manufacturing the same.
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  270. Suehiro, Yoshinobu; Inoue, Mitsuhiro; Kato, Hideaki; Hadame, Kunihiro; Tohmon, Ryoichi; Wada, Satoshi; Ota, Koichi; Aida, Kazuya; Watanabe, Hiroki; Yamamoto, Yoshinori; Ohtsuka, Masaaki; Sawanobori, Naruhito, Solid element device and method for manufacturing the same.
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  271. He,Xiping; Tomaso,Torey, Sprayable adhesive material for laser marking semiconductor wafers and dies.
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  272. Moden Walter L. ; Corisis David J. ; Mess Leonard E. ; Kinsman Larry D., Stackable ceramic FBGA for high thermal applications.
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  273. Moden, Walter L.; Corisis, David J.; Mess, Leonard E.; Kinsman, Larry D., Stackable ceramic FBGA for high thermal applications.
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  274. Moden, Walter L.; Corisis, David J.; Mess, Leonard E.; Kinsman, Larry D., Stackable ceramic FBGA for high thermal applications.
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  275. Moden,Walter L.; Corisis,David J.; Mess,Leonard E.; Kinsman,Larry D., Stackable ceramic FBGA for high thermal applications.
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  276. Moden, Walter L.; Corisis, David J.; Mess, Leonard E.; Kinsman, Larry D., Stackable ceramic fbga for high thermal applications.
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  277. Crowley,Sean Timothy; Alvarez,Angel Orabuena; Yang,Jun Young, Stackable semiconductor package and method for manufacturing same.
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  279. Scanlan, Christopher M.; Berry, Christopher J., Stackable semiconductor package including laminate interposer.
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  283. McCann,David R.; Groover,Richard L.; Hoffman,Paul R., Thermally enhanced chip scale lead on chip semiconductor package and method of making same.
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  284. McLellan,Neil; Pedron,Serafin; Higgins, III,Leo M.; Tsang,Kwok Cheung; Kwan,Kin Pui, Thin array plastic package without die attach pad and process for fabricating the same.
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  287. Berry, Christopher J.; Scanlan, Christopher M., Thin stacked interposer package.
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  289. Hiner, David Jon; Huemoeller, Ronald Patrick, Through via connected backside embedded circuit features structure and method.
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  290. Huemoeller, Ronald Patrick; Reed, Frederick Evans; Hiner, David Jon; Lee, Kiwook, Through via nub reveal method and structure.
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  291. Huemoeller, Ronald Patrick; Reed, Frederick Evans; Hiner, David Jon; Lee, Kiwook, Through via nub reveal method and structure.
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  292. Hiner, David Jon; Huemoeller, Ronald Patrick; Kelly, Michael G., Through via recessed reveal structure and method.
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  293. Hiner, David Jon; Huemoeller, Ronald Patrick; Kelly, Michael G., Through via recessed reveal structure and method.
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  295. Huemoeller,Ronald Patrick; Lie,Russ; Hiner,David, Two-sided wafer escape package.
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  298. Huemoeller, Ronald Patrick; Rusli, Sukianto; Razu, David, Wafer level package and fabrication method.
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  299. Huemoeller, Ronald Patrick; Rusli, Sukianto; Razu, David, Wafer level package and fabrication method.
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  300. Huemoeller, Ronald Patrick; Rusli, Sukianto; Razu, David, Wafer level package and fabrication method.
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AI-Helper
안녕하세요, AI-Helper입니다. 좌측 "선택된 텍스트"에서 텍스트를 선택하여 요약, 번역, 용어설명을 실행하세요.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.

선택된 텍스트

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