초록 ▼

A method for rotating bi-level image data plus or minus 90°. An 8×8 pixel block is selected for rotation from the image data and, using lookup tables, an intermediate matrix is generated dynamically and stored into two 32-bit registers in the processor. Generation of the intermediate matrix partiall

A method for rotating bi-level image data plus or minus 90°. An 8×8 pixel block is selected for rotation from the image data and, using lookup tables, an intermediate matrix is generated dynamically and stored into two 32-bit registers in the processor. Generation of the intermediate matrix partially rotates and stores the odd-numbered rows from the block of data in the first 32-bit register and the even-numbered rows from the block in the second 32-bit register. The first and second registers are copied, respectively, into third and fourth 32-bit registers. The first and second registers are then shifted one bit in opposite directions. The first register is logical ORed with the fourth register, and the second register is logical ORed with the third register so that the even bits are replaced in one register and the odd bits in the other. These steps are repeated for all remaining blocks of image data.

대표청구항 ▼

In a 32-bit operating system, a method of rotating by 90°a block of bi-level image data having 8 rows by 8 columns of pixel data bits, comprising the computer implemented steps of: generating an intermediate matrix having 8 rows by 8 columns of pixel data bits from the pixel data bits of the block,

In a 32-bit operating system, a method of rotating by 90°a block of bi-level image data having 8 rows by 8 columns of pixel data bits, comprising the computer implemented steps of: generating an intermediate matrix having 8 rows by 8 columns of pixel data bits from the pixel data bits of the block, wherein the block is divided into four row pairs and the intermediate matrix is divided into four nibble column pairs, each said row pair corresponding to one of the nibble column pairs, each row of each row pair being divided into two halves, one of said halves of one row of each row pair being rotated 90°and translated to form a top half of one nibble column of the corresponding nibble column pair, the other one of said halves of said one row also being rotated 90°and translated to form a top half of the other nibble column of the corresponding nibble column pair, one of said halves of the other row of each row pair being rotated 90°and translated to form a bottom half of said one nibble column, the other one of said halves of said other row being rotated 90°and translated to form a bottom half of the other nibble column of the corresponding nibble column pair; saving the rows of the intermediate matrix sequentially into first and second 32-bit processor registers; copying the first 32-bit register into a third 32-bit processor register and the second 32-bit register into a fourth 32-bit processor register; shifting each of the first and second registers by one bit in opposite directions; and overlaying alternate bits from the fourth register onto the first register and from the third register onto the second register.