초록 ▼

An identification apparatus and method for identifying the microprocessor, including a read-only memory for storing microprocessor ID data having data fields for identifying the microprocessor, and control logic for executing an ID instruction that reads the microprocessor ID data from the read-only

An identification apparatus and method for identifying the microprocessor, including a read-only memory for storing microprocessor ID data having data fields for identifying the microprocessor, and control logic for executing an ID instruction that reads the microprocessor ID data from the read-only memory and stores it in a register that can be selectively read by a programmer. The identification apparatus and method also include an ID flag indicative of implementation of the ID instruction in the microprocessor, and a test flag program for testing the ID flag to determine whether or not to execute the ID instruction. The method is available at any time while the microprocessor is operating, for example during initialization of the system software, installation of a program, or while a program is running. Once a microprocessor has been identified, features appropriate to the specific microprocessor can be enabled, and work-around programs can be installed. The method prevents execution of the ID instruction on microprocessors that do not have the identification system, and prevents execution of the test flag program on microprocessors that do not have a test flag location. The invention is particularly useful for groups of compatible microprocessor families whose development is continually advancing with introduction of new families and models.

대표청구항 ▼

An identification apparatus within a microprocessor for identifying the microprocessor in response to an identification instruction, comprising: a first read only memory storing microprocessor identification data, the identification data including data fields that identify a type of the microprocess

An identification apparatus within a microprocessor for identifying the microprocessor in response to an identification instruction, comprising: a first read only memory storing microprocessor identification data, the identification data including data fields that identify a type of the microprocessor, wherein the first read only memory is formed in the microprocessor; a decoder for receiving and decoding instructions, the decoder providing a decoded identification instruction from a received identification instruction; a microcode read only memory, the microcode read only memory separate from the first read only memory; control logic that executes decoded instructions from the decoder, the control logic coupled to the microcode read only memory for assistance with execution of decoded instructions from the decoder; and a register, wherein the control logic reads the first read only memory and stores at least a portion of the microprocessor identification data in the register in response to the decoded identification instruction.