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Redundant array of solid state memory devices 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-012/02
  • G06F-011/00
출원번호 US-0540338 (1996-01-25)
발명자 / 주소
  • Young Paul R. (Cromwell CT) Solari Peter L. (Lebanon CT) Shumski Gregory J. (Colchester CT) So Yin Cheung (Fremont CA)
출원인 / 주소
  • Kaman Aerospace Corporation (Bloomfield CT 02)
인용정보 피인용 횟수 : 170  인용 특허 : 8

초록

A device employing a redundant array of solid state memory devices is presented, whereby RAID technology architecture is uniquely combined with solid state memory devices. The devices comprises a plurality of circuit boards assemblies mounted within a housing, preferably a housing which fits into a

대표청구항

A method for storage of data and interfacing with a host system, comprising the steps of: configuring a plurality of solid state memory devices, said plurality of solid state memory devices comprises a plurality of flash memory devices, each of said flash memory devices is packaged in a PCMCIA forma

이 특허에 인용된 특허 (8)

  1. Manka Paul S. (Boulder CO), Direct access storage device with independently stored parity.
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  6. Moran Dov (Kfar-Saba ILX) Levy Rony (Tel-Aviv ILX) Deitcher David (Ra\anana ILX) Mergui Arie (Tel-Aviv ILX) Ban Amir (Hamacabi ILX) Yurtsev Anatoly (Ramat-Gan ILX), Flash memory system providing both BIOS and user storage capability.
  7. Hohenstein Gerald L. (Boulder CO) Nielson Michael E. (Broomfield CO) Tang Tin S. (Boulder CO) Carmichael Richard D. (Longmont CO) Brant William A. (Boulder CO), Flexible parity generation circuit for intermittently generating a parity for a plurality of data channels in a redundan.
  8. Norman Robert D. (San Jose CA) Lofgren Karl M. J. (Newport Beach CA) Stai Jeffrey D. (Placentia CA) Gupta Anil (Irvine CA) Mehrotra Sanjay (Milpitas CA), Solid state memory system including plural memory chips and a serialized bus.

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