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Bus interface to a RAID architecture 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-013/00
  • G06F-011/10
출원번호 US-0571386 (1995-12-13)
발명자 / 주소
  • Kabenjian Gregory V. (Duarte CA)
출원인 / 주소
  • AST Research, Inc. (Irvine CA 02)
인용정보 피인용 횟수 : 65  인용 특허 : 0

초록 ▼

A file server system provides increased bandwidth between a processor, a memory and a redundant array of inexpensive disks (RAID). The file server includes a processor connected to a processor bus. A first bridging circuit couples the processor bus to a peripheral bus. An array of disks is controlle

대표청구항 ▼

A file server system which provides increased bandwidth between a processor, a memory and a redundant array of inexpensive disks (RAID) subsystem, said file server system comprising: a processor connected to a processor bus; a peripheral bus coupled to said processor bus by a first bridging circuit,

이 특허를 인용한 특허 (65)

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  6. Ponce, Cyrill C.; Fuentes, Marizonne O.; Noble, Gianico G., Bit-mapped DMA transfer with dependency table configured to monitor status so that a processor is not rendered as a bottleneck in a system.
    상세보기
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