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Semiconductor device with improved bond pads 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/48
출원번호 US-0577911 (1995-12-21)
발명자 / 주소
  • Langley Rodney C. (Boise ID)
출원인 / 주소
  • Micron Technology, Inc. (Boise ID 02)
인용정보 피인용 횟수 : 80  인용 특허 : 3

초록 ▼

A semiconductor device with improved bond pads. The semiconductor device includes bond pads electrically connected to an active circuit in the device and openings formed in the bonding surface of the bond pads. The opening(s) may include recesses extending partially into the bonding surface or chann

대표청구항

A semiconductor device having an improved bond pad, the semiconductor device comprising: a. a bond pad electrically connected to an active circuit in the semiconductor device; b. a substantially flat bonding surface on the bond pad; and c. an opening extending partially into the bonding surface.

이 특허에 인용된 특허 (3)

  1. McClure Kevin E. (Kokomo IN) Douglas Thomas P. (Kokomo IN) Houk Larry W. (Kokomo IN), Bond pad having a patterned bonding surface.
    상세보기
  2. Baker Thomas R. (Tempe AZ) Anderson George F. (Tempe AZ), Bonding pad for semiconductor devices.
    상세보기
  3. Heim Dorothy A. (San Jose CA), Composite bond pads for semiconductor devices.
    상세보기

이 특허를 인용한 특허 (80)

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  7. Oganesian, Vage; Haba, Belgacem; Mohammed, Ilyas; Savalia, Piyush; Mitchell, Craig, Compliant interconnects in wafers.
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  10. Haba, Belgacem, Conductive pads defined by embedded traces.
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  11. Haba, Belgacem, Conductive pads defined by embedded traces.
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  12. Zhang, Leilei, Contact pad and method of forming a contact pad for an integrated circuit.
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  13. Yamamoto, Koji; Kumamoto, Nobuhisa; Matsumoto, Muneyuki, Damascene interconnection and semiconductor device.
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  15. Akram Salman ; Farnworth Warren M. ; Wood Alan G., High density flip chip memory arrays.
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  17. Adkisson,James W.; Gambino,Jeffrey P.; Jaffe,Mark D.; Rassel,Richard J.; Sprogis,Edmund J., High surface area aluminum bond pad for through-wafer connections to an electronic package.
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  18. Shen, Wen-Wei; Chen, Chen-Shien; Kuo, Chen-Cheng; Chen, Ming-Fa; Wang, Rung-De, Improving the strength of micro-bump joints.
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  19. Antol, Joze Eura; Osenbach, John William; Weachock, Ronald James, Integrated circuit package including wire bonds.
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  20. Do, Byung Tai; Shim, Il Kwon; Chow, Seng Guan, Integrated circuit packaging system for fine pitch substrates.
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  22. Gregory J. Smith, Integrated circuit with fuse element and contact pad.
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  23. Teng Kuo-Shi,TWX ; Yung Hao-Chieh,TWX ; Chiang Shing-Shing,TWX ; Lu Wen-Haw,TWX, Method and structure for preventing bonding pads from peeling caused by plug process.
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  24. Yiu Ho-Yin,TWX ; Wu Lin-June,TWX ; Chen Bor-Cheng,TWX ; Horng J. H.,TWX, Method for fabricating a stress buffered bond pad.
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  25. Jeng-Jie Peng TW; Ming-Dou Ker TW; Nien-Ming Wang TW, Method for improving integrated circuits bonding firmness.
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  27. Lin, Po Chun, Method for manufacturing a semiconductor structure.
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  28. Hoier, Magdalena; Scherl, Peter; Schneegans, Manfred, Method of forming a bondpad and bondpad.
    상세보기
  29. Chen,Sheng Hsiung, Method of improving copper pad adhesion.
    상세보기
  30. Akram, Salman; Farnworth, Warren M.; Wood, Alan G., Methods of a high density flip chip memory arrays.
    상세보기
  31. Oganesian, Vage; Haba, Belgacem; Mitchell, Craig; Mohammed, Ilyas; Savalia, Piyush, Methods of forming semiconductor elements using micro-abrasive particle stream.
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  32. Dias,Rajen; Chandran,Biju, Microelectronic device interconnects.
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  33. Oganesian, Vage; Mohammed, Ilyas; Mitchell, Craig; Haba, Belgacem; Savalia, Piyush, Microelectronic elements having metallic pads overlying vias.
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  35. Oganesian, Vage; Haba, Belgacem; Mohammed, Ilyas; Mitchell, Craig; Savalia, Piyush, Multi-function and shielded 3D interconnects.
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  46. Tilly Lars,SEX, Semiconductive chip having a bond pad located on an active device.
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  48. Kanzaki, Teruaki; Deguchi, Yoshinori; Miki, Kazunobu, Semiconductor device.
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  53. Kimura, Noriyuki; Kadoi, Kiyoaki, Semiconductor device having a bump electrode.
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  54. Anand, Minakshisundaran Balasubramanian, Semiconductor device having a plurality of conductive layers.
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  56. Lee, Hun Teak; Kim, Jong Kook; Kim, ChulSik; Jang, Ki Youn, Semiconductor package system with fine pitch lead fingers and method of manufacturing thereof.
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  61. Hutchinson, Erik Jon; Unger, Christopher Michael, Slider bond pad with a recessed channel.
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  63. Oganesian, Vage; Haba, Belgacem; Mohammed, Ilyas; Mitchell, Craig; Savalia, Piyush, Stacked microelectronic assembly with TSVS formed in stages and carrier above chip.
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  67. Oganesian, Vage; Haba, Belgacem; Mohammed, Ilyas; Mitchell, Craig; Savalia, Piyush, Stacked microelectronic assembly with TSVs formed in stages with plural active chips.
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  68. Oganesian, Vage; Haba, Belgacem; Mohammed, Ilyas; Mitchell, Craig; Savalia, Piyush, Stacked microelectronic assemby with TSVS formed in stages and carrier above chip.
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  69. Oganesian, Vage; Haba, Belgacem; Mohammed, Ilyas; Mitchell, Craig; Savalia, Piyush, Staged via formation from both sides of chip.
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  70. Oganesian, Vage; Haba, Belgacem; Mohammed, Ilyas; Mitchell, Craig; Savalia, Piyush, Staged via formation from both sides of chip.
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  71. Oganesian, Vage; Haba, Belgacem; Mohammed, Ilyas; Mitchell, Craig; Savalia, Piyush, Staged via formation from both sides of chip.
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  72. Shen, Wen-Wei; Chen, Chen-Shien; Kuo, Chen-Cheng; Chen, Ming-Fa; Wang, Rung-De, Strength of micro-bump joints.
    상세보기
  73. Yiu Ho-Yin,HKX ; Wu Lin-June,TWX ; Chen Bor-Cheng,TWX ; Horng Jan-Her,TWX, Stress buffered bond pad and method of making.
    상세보기
  74. Saran Mukul ; Martin Charles A., System and method for reinforcing a bond pad.
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  75. Lee, Hun-Teak; Kim, Jong-Kook; Kim, Chul-Sik; Jang, Ki-Youn; Pendse, Rajendra D., Wire bond interconnection.
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  79. Pendse, Rajendra D.; Han, Byung Joon; Lee, Hun Teak, Wire bonding structure and method that eliminates special wire bondable finish and reduces bonding pitch on substrates.
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