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Dynamically programmable gate array with multiple contexts 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H03K-019/177
출원번호 US-0386851 (1995-02-10)
발명자 / 주소
  • DeHon Andre
  • Knight
  • Jr. Thomas F.
  • Tau Edward
  • Bolotski Michael
  • Eslick Ian
  • Chen Derrick
  • Brown Jeremy
출원인 / 주소
  • Massachusetts Institute of Technology
대리인 / 주소
    Hamilton, Brook, Smith & Reynolds, P.C.
인용정보 피인용 횟수 : 296  인용 특허 : 0

초록 ▼

An integrated dynamically programmable gate array comprises a two dimensional array of programmable gates. These gates can be implemented as look up tables but hardwired gates with programmable interconnections are also possible. Each one of the gates receives plural input logic signals from plural

대표청구항 ▼

[ We claim:] [1.] An integrated dynamically programmable logic array, comprising:at least a two dimensional array of programmable logic elements, each one of the logic elements receiving plural input logic signals from plural other logic elements and including locally stored multiple contexts dictat

이 특허를 인용한 특허 (296)

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