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Reduced area of crossbar and method of operation 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-015/173
  • G06F-015/80
출원번호 US-0483657 (1995-06-07)
발명자 / 주소
  • Gove Robert J.
  • Balmer Keith,GB2
  • Ing-Simmons Nicholas Kerin,GB2
  • Guttag Karl Marion
출원인 / 주소
  • Texas Instruments Incorporated
대리인 / 주소
    Marshall, Jr.
인용정보 피인용 횟수 : 212  인용 특허 : 0

초록

There is disclosed a multi-processor system and method arranged, in one embodiment, as an image and graphics processor. The image processor is structured with several individual processors all having communication links to several memories. A crossbar switch serves to establish the processor memory

대표청구항

[ What is claimed is:] [1.] A multi-processing system comprising:a plurality of n processors, each of said processors operable from an instruction stream provided from a memory source for controlling a process, said process relying on the movement of data to and from one or more addressable memories

이 특허를 인용한 특허 (212)

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  51. Silverbrook, Kia, Hand-held quad core processing apparatus.
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  53. Silverbrook, Kia, Handheld imaging device incorporating multi-core image processor.
  54. Silverbrook, Kia, Handheld imaging device with VLIW image processor.
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  89. Bonalle, David S.; Larkin, Carl; Saunders, Peter D., Method and system for a travel-related multi-function fob.
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  211. Beenau,Blayn W.; Bonalle,David S.; Vander Eyk,Becky; Isenberg,Susan E.; Malnati,Leigh; Mueller,Sue; Norcross,Zarita; Peart,Lee J.; Saunders,Peter D.; Skilling Belmond,Lisa; Webb,Lisa; Williamson,John, Transparent transaction device.
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