초록 ▼

A first metal layer is formed on a substrate of an integrated circuit and electrically interconnects a microelectronic device and an Input/Output (I/O) pad. A second metal layer is insulated from the first metal layer by a dielectric layer, and is connected directly only to the pad. A plurality of v

A first metal layer is formed on a substrate of an integrated circuit and electrically interconnects a microelectronic device and an Input/Output (I/O) pad. A second metal layer is insulated from the first metal layer by a dielectric layer, and is connected directly only to the pad. A plurality of vias are formed through the dielectric layer, and electrically interconnect the first and second metal layers such that current can flow between the device and the pad through both metal layers and the vias. A higher scale of circuit integration is made possible by reducing the widths of the metal layers without reducing their combined current carrying capacity. An Electrostatic Discharge (ESD) protection device is connected to one or both of the first and second metal layers such that current can flow from the pad to the protection device during an ESD event through both metal layers and the vias. The increased current carrying capacity provided by the two metal layers and vias increases the resistance of the metal layers to damage induced by high current flow during ESD events.

대표청구항 ▼

[ We claim:] [1.] A metallization structure for electrically interconnecting a microelectronic device and an Input/Output (I/O) pad on a substrate of an integrated circuit, comprising:a first electrically conductive metal layer which is electrically connected to the device and the pad at opposite en

[ We claim:] [1.] A metallization structure for electrically interconnecting a microelectronic device and an Input/Output (I/O) pad on a substrate of an integrated circuit, comprising:a first electrically conductive metal layer which is electrically connected to the device and the pad at opposite ends thereof respectively;a second electrically conductive metal layer which is connected to the pad at an end thereof;a first dielectric layer formed which is formed between and electrically insulates the first and second metal layers from each other; anda plurality of first electrically conductive interconnects which are formed through the dielectric layer and electrically connected to the first and second metal layers at opposite ends thereof respectively.