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Integrated pad and fuse structure for planar copper metallurgy 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-029/40
  • H01L-023/48
  • H01L-023/52
출원번호 US-9256555 (1997-09-09)
발명자 / 주소
  • Motsiff William Thomas
  • Geffken Robert Michael
  • Uttecht Ronald Robert
출원인 / 주소
  • International Business Machines Corporation
대리인 / 주소
    Whitham, Curtis & WhithamWalter
인용정보 피인용 횟수 : 37  인용 특허 : 7

초록

A semiconductor interconnection consists of a corrosion resistant integrated fuse and Controlled, Collapse Chip Connection (C4) structure for the planar copper Back End of Line (BEOL). Non copper fuse material is directly connected to copper wiring.

대표청구항

[ Having thus described our invention, what we claim as new and desire to secure by Letters Patent is as follows:] [1.] A method of making an interconnection structure for a semiconductor circuit comprising the steps of:

이 특허에 인용된 특허 (7)

  1. Cohen Stephen A. (Wappingers Falls NY) Edelstein Daniel C. (New Rochelle NY) Grill Alfred (White Plains NY) Paraszczak Jurij R. (Pleasantville NY) Patel Vishnubhai V. (Yorktown NY), Diamond-like carbon for use in VLSI and ULSI interconnect systems.
    상세보기
  2. Srikrishnan Kris V. (Wappingers Falls NY) White James F. (Newburgh NY) Yang Jer-Ming (Changhua TWX), Electrically blowable fuse structure for organic insulators.
    상세보기
  3. Gurevich Leon (St. Louis MO), Metallo-organic film fractional ampere fuses and method of making.
    상세보기
  4. Broadbent Eliot K. (San Jose CA), Method for manufacturing a planar electrical interconnection utilizing isotropic deposition of conductive material.
    상세보기
  5. Mo Roy (Flushing NY), Method of making self-aligned tungsten interconnection in an integrated circuit.
    상세보기
  6. Kapoor Ashok K. (Palo Alto CA), Product of process for formation of vias (or contact openings) and fuses in the same insulation layer with minimal addit.
    상세보기
  7. Lee Chong E. (Milpitas CA), Self-aligned via and contact interconnect manufacturing method.
    상세보기

이 특허를 인용한 특허 (37)

  1. Daubenspeck, Timothy H.; Klaasen, William A.; Motsiff, William T.; Previti-Kelly, Rosemary A.; Rankin, Jed H., Antifuse for use with low κ dielectric foam insulators.
    상세보기
  2. Timothy H. Daubenspeck ; William A. Klaasen ; William T. Motsiff ; Rosemary A. Previti-Kelly ; Jed H. Rankin, Antifuse for use with low k dielectric foam insulators.
    상세보기
  3. Timothy Daubenspeck ; Kurt R. Kimmel ; William A. Klaasen ; William T. Motsiff ; Rosemary A. Previti-Kelly ; W David Pricer ; Jed H. Rankin, Corrosion insensitive fusible link using capacitance sensing for semiconductor devices.
    상세보기
  4. Geffken, Robert M.; Hautala, John J., Dual damascene integration structure and method for forming improved dual damascene integration structure.
    상세보기
  5. Thei, Kong-Beng; Cheng, Chung Long; Liu, Chung-Shi; Chuang, Harry-Hak-Lay; Wu, Shien-Yang; Chen, Shi-Bai, E-fuse structure design in electrical programmable redundancy for embedded memory circuit.
    상세보기
  6. Thei, Kong-Beng; Cheng, Chung Long; Liu, Chung-Shi; Chuang, Harry-Hak-Lay; Wu, Shien-Yang; Chen, Shi-Bai, E-fuse structure design in electrical programmable redundancy for embedded memory circuit.
    상세보기
  7. Barth, Hans-Joachim; Felsner, Petra; Kaltalioglu, Erdem; Friese, Gerald, FBEOL process for Cu metallizations free from Al-wirebond pads.
    상세보기
  8. Thei, Kong-Beng; Cheng, Chung Long; Liu, Chung-Shi; Chuang, Harry; Wu, Shien-Yang; Chen, Shi-Bai, Fuse structure.
    상세보기
  9. Timothy H. Daubenspeck ; William T. Motsiff, High laser absorption copper fuse and method for making the same.
    상세보기
  10. Pricer, Wilbur D.; Previti-Kelly, Rosemary A.; Motsiff, William T., Inductive fuse for semiconductor device.
    상세보기
  11. Wilbur D. Pricer ; Rosemary A. Previti-Kelly ; William T. Motsiff, Inductive fuse for semiconductor device.
    상세보기
  12. Cheng, Chuan-Cheng; Liu, Yauh-Ching, Integrated capacitor and fuse.
    상세보기
  13. Tsai Chao-Chieh,TWX, Metal fuse in copper dual damascene.
    상세보기
  14. Tsai, Chao-Chieh, Metal fuse in copper dual damascene.
    상세보기
  15. Adler Eric ; Trombley Henry W., Metal-insulator-metal capacitor for copper damascene process and method of forming the same.
    상세보기
  16. Voldman, Steven H.; Stamper, Anthony K., Method and structure for forming precision MIM fusible circuit elements using fuses and antifuses.
    상세보기
  17. Reber, Douglas M.; Shroff, Mehul D.; Travis, Edward O., Method for forming an integrated circuit having a programmable fuse.
    상세보기
  18. Allen Lynn R., Method for preventing oxidation in the formation of a via in an integrated circuit.
    상세보기
  19. Chuan-Cheng Cheng ; Yauh-Ching Liu, Method for simultaneous formation of integrated capacitor and fuse.
    상세보기
  20. Adler,Eric, Method of fabricating a capacitor having sidewall spacer protecting the dielectric layer.
    상세보기
  21. Son, Hong-Seong; Hah, Sang-Rok; Koo, Ja-Eung, Method of fabricating a metal-insulator-metal capacitor.
    상세보기
  22. Stuart E. Greer, Method of forming copper interconnection utilizing aluminum capping film.
    상세보기
  23. Lee Dong-Hun,KRX ; Ahn Jong-Hyon,KRX, Method of making a fuse in a semiconductor device and a semiconductor device having a fuse.
    상세보기
  24. Tze-Liang Lee TW; Mong-Song Liang TW, Method of protecting a copper pad structure during a fuse opening procedure.
    상세보기
  25. Edelstein,Daniel C.; Kang,Sung Kwon; McGlashan Powell,Maurice; O'Sullivan,Eugene J.; Walker,George F., Method to selectively cap interconnects with indium or tin bronzes and/or oxides thereof and the interconnect so capped.
    상세보기
  26. Wojtczuk, Steven J.; Moe, James G.; Little, Roger G., Nanophotovoltaic devices.
    상세보기
  27. Kurt R. Kimmel ; J. Alex Chediak ; William T. Motsiff ; Wilbur D. Pricer ; Richard Q. Williams, Re-settable tristate programmable device.
    상세보기
  28. Kurt R. Kimmel ; J. Alex Chediak ; William T. Motsiff ; Wilbur D. Pricer ; Richard Q. Williams, Re-settable tristate programmable device.
    상세보기
  29. Edelstein Daniel Charles ; McGahay Vincent ; Nye ; III Henry A. ; Ottey Brian George Reid ; Price William H., Robust interconnect structure.
    상세보기
  30. Lin, Kang-Cheng; Hsia, Chin-Chiu, Scheme to define laser fuse in dual damascene CU process.
    상세보기
  31. Kurosawa, Yasunori, Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument.
    상세보기
  32. Kobayashi, Thomas S.; Sheck, Stephen G.; Pozder, Scott K., Semiconductor device having a fuse and method of forming thereof.
    상세보기
  33. Park, Seung Han; Lee, Ki Young, Semiconductor device having fuse and capacitor at the same level and method of fabricating the same.
    상세보기
  34. Park,Seung Han; Lee,Ki Young, Semiconductor device having fuse and capacitor at the same level and method of fabricating the same.
    상세보기
  35. Reber, Douglas M.; Shroff, Mehul D.; Travis, Edward O., Thin beam deposited fuse.
    상세보기
  36. Daubenspeck, Timothy H.; Gambino, Jeffrey P.; Motsiff, William T., Thinning of fuse passivation after C4 formation.
    상세보기
  37. McDevitt, Thomas L.; Stamper, Anthony K., Tri-layer dielectric fuse cap for laser deletion.
    상세보기

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