초록 ▼

A programmable logic device (PLD) including configurable circuitry for altering the speed-versus-power characteristics of the PLD after production, and for allowing the PLD to selectively operate on either a 3.3-volt or a 5-volt power supply. The configurable circuitry includes an input buffer, an o

A programmable logic device (PLD) including configurable circuitry for altering the speed-versus-power characteristics of the PLD after production, and for allowing the PLD to selectively operate on either a 3.3-volt or a 5-volt power supply. The configurable circuitry includes an input buffer, an output buffer and a reference generator. The input buffer includes a dedicated P-channel transistor connected in series with a dedicated N-channel transistor, and a plurality of trip-point adjustment transistors which are selectively connected in parallel with the dedicated transistors to adjust the trip-point of the input buffer by altering the N-to-P ratio. The output buffer includes two configurable buffers whose trip-points are also adjustable. A configurable reference generator is also provided for generating a high precision reference voltage which is supplied to the sense amplifiers located in the function blocks and interconnect matrix of the PLD.

대표청구항 ▼

[ We claim:] [1.] A programmable logic device comprising:an input pin for receiving an input signal;a function block including an input terminal which is programmably coupled to the input pin, the function block including circuitry which is programmable to implement a desired logic function; anda co

[ We claim:] [1.] A programmable logic device comprising:an input pin for receiving an input signal;a function block including an input terminal which is programmably coupled to the input pin, the function block including circuitry which is programmable to implement a desired logic function; anda configurable input buffer including:an input terminal connected to the input pin;a first transistor having a gate connected to the input terminal, a first terminal connected to a voltage source, and a second terminal;a second transistor having a gate connectable to the voltage source, a first terminal connected to the voltage source, and a second terminal;a third transistor having a gate connected to the input terminal, a first terminal connected to the second terminal of the second transistor, and a second terminal; andan output terminal connected to the second terminals of the first and third transistors.