$\require{mediawiki-texvc}$

연합인증

연합인증 가입 기관의 연구자들은 소속기관의 인증정보(ID와 암호)를 이용해 다른 대학, 연구기관, 서비스 공급자의 다양한 온라인 자원과 연구 데이터를 이용할 수 있습니다.

이는 여행자가 자국에서 발행 받은 여권으로 세계 각국을 자유롭게 여행할 수 있는 것과 같습니다.

연합인증으로 이용이 가능한 서비스는 NTIS, DataON, Edison, Kafe, Webinar 등이 있습니다.

한번의 인증절차만으로 연합인증 가입 서비스에 추가 로그인 없이 이용이 가능합니다.

다만, 연합인증을 위해서는 최초 1회만 인증 절차가 필요합니다. (회원이 아닐 경우 회원 가입이 필요합니다.)

연합인증 절차는 다음과 같습니다.

최초이용시에는
ScienceON에 로그인 → 연합인증 서비스 접속 → 로그인 (본인 확인 또는 회원가입) → 서비스 이용

그 이후에는
ScienceON 로그인 → 연합인증 서비스 접속 → 서비스 이용

연합인증을 활용하시면 KISTI가 제공하는 다양한 서비스를 편리하게 이용하실 수 있습니다.

[미국특허] Computer having a high density connector system 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-013/20
출원번호 US-0702195 (1996-08-23)
발명자 / 주소
  • Crane
  • Jr. Stanford W.
  • Portuondo Maria M.
  • Erickson Willard
  • Bizzarri Maurice
출원인 / 주소
  • The Panda Project
대리인 / 주소
    Morgan, Lewis & Bockius LLP
인용정보 피인용 횟수 : 21  인용 특허 : 52

초록

A computer system architecture in which functionally compatible electronic components are located on modular printed circuit boards. Thus, a type of processor used by the system can be changed by replacing the printed circuit board incorporating the processor. Similarly a type of peripheral bus used

대표청구항

[ What is claimed is:] [1.] A computer system, comprising:a first plurality of slots for printed circuit boards using high-density connector systems, each of the high-density connector systems having one connector, having two rows of contact elements, on each side of a printed circuit board, the eac

이 특허에 인용된 특허 (52) 인용/피인용 타임라인 분석

  1. Balakrishnan Ramanatha V. (San Jose CA), Active bus backplane.
  2. Frei John K. (Mesa AZ) Brice-Heames Kenneth (Mesa AZ), Apparatus for adapting semiconductor die pads and method therefor.
  3. Brune Johannes (Erlangen DEX) Latussek Hans-Peter (Feucht DEX), Backplane for supporting removable modular.
  4. Higgins ; III Leo M. (Lakeville MA), Circuit board fabrication.
  5. Sucheski Matthew M. (Harrisburg PA) Barkus Lee A. (Millersburg PA), Coaxial contact element.
  6. Shah Kaushik S. (Santa Clara CA) Glider Joseph S. (Palo Alto CA) Asato Edward E. (Sunnyvale CA) Johnson ; III Hoke S. (Monte Sereno CA) Trang Duc H. (San Jose CA), Dual channel data block transfer bus.
  7. Billman Timothy B. (King NC) Thrush Roger L. (Clemmons NC), Dual readout extended socket.
  8. Goldfarb Samuel (21 Sycamore Dr. Roslyn ; County of Nassau NY 11576), Electronic component package with multiconductive base forms for multichannel mounting.
  9. Whitsitt Steven L. (Waukesha WI), Expanded register rack for a programmable logic controller.
  10. McNeill Andrew B. (Deerfield Beach FL) Newsom Thomas H. (Boca Raton FL) Osborn Neal A. (Delray Beach FL) Reid Eddie M. (Boca Raton FL), Feature board with automatic adjustment to one of two bus widths based on sensing power level at one connection contact.
  11. Sugimoto Masahiro (Yokosuka JPX) Wakasugi Yasumasa (Kawasaki JPX) Harada Shigeki (Kawasaki JPX), Heatsink package for flip-chip IC.
  12. Shaheen Joseph M. (La Habra CA) Yamaguchi James S. (Lake Forest CA), Hermetic organic/inorganic interconnection substrate for hybrid circuit manufacture.
  13. Mendenhall David W. (Greenville RI) Marian Steve P. (Plainville MA) Goff Jay T. (Cranston RI) Cotter Neil J. (Marston Mills MA) Corbesero Steve R. (Johnston RI), High density backplane connector.
  14. Biechler Donald t. (Harrisburg PA) Hillbish Warren C. (Hummelstown PA) Kaufman John W. (Hershey PA), High density electrical connector.
  15. Krajewski Nicholas J. (Chippewa Falls WI) Breske Carl D. (Scandia MN) Johnson David J. (Chippewa Falls WI) Kiefer David R. (Chippewa Falls WI) McDaniel Kent T. (Eau Claire WI) Moore ; Jr. William T. , High density interconnect apparatus.
  16. Frankeny, Jerome A.; Frankeny, Richard F.; Haj-Ali-Ahmadi, Javad; Hermann, Karl; Imken, Ronald L., High density interconnect strip.
  17. Malo Cheryne (Foxboro MA) Marian Steven P. (Plainville MA) Mendenhall David W. (Greenville RI), High density parallel interconnect.
  18. Desai Kishor V. (Vestal NY) Macek Thomas G. (Endicott NY) Patel Maganlal S. (Endicott NY) Thomas Edwin L. (Apalachin NY), High density, separable connector and contact for use therein.
  19. Pope Richard A. (Austin TX) Boling Clyde W. (Austin TX) Bates David A. (Cedar Park TX), High-density connector.
  20. Yoshizumi Toshiaki (Hyogo JPX) Yoshioka Akiyoshi (Hyogo JPX), High-voltage thyristor converter and laser with mirror control therefor.
  21. Tukamoto Takashi (Suwa JPX) Abe Sachiyuki (Suwa JPX) Yabushita Tetsuo (Suwa JPX) Hayashi Yoshimitsu (Suwa JPX), Integrated circuit package for flexible computer system alternative architectures.
  22. Shaffer Howard R. (Millersburg PA), Limited insertion force contact terminals and connectors.
  23. Coder James E. (Bradford PA), Lock open folding knife with side release.
  24. Murphy Preston J. (Austin TX), Method and apparatus for controlling circuit expansion for consumer electronic systems.
  25. Husak David J. (Windham NH) Madnick Jay L. (Derry NH) Hauser Stephen A. (Burlington MA), Method and apparatus for live insertion and removal of electronic sub-assemblies.
  26. Gregoire George D. (9927 Aviary Dr. San Diego CA 92131), Method and apparatus for making printed circuit boards.
  27. Gregoire George D. (9927 Aviary Dr. San Diego CA 92131), Method for making printed circuit boards.
  28. Gregoire George D. (San Diego CA), Method of mounting a surface-mountable IC to a converter board.
  29. Reylek Robert S. (St. Paul MN) Thompson Kenneth C. (St. Paul MN), Miniature multiple conductor electrical connector.
  30. Marian Steven P. (Plainville MA), Modified high density backplane connector.
  31. Deters John B. (17743 Soda Springs Rd. Los Gatos CA 95030), Modular computer system with passive backplane.
  32. Taniuchi Kenjiro (Kawasaki JPX) Miyazawa Hideo (Kawasaki JPX) Ishikawa Kouji (Kawasaki JPX) Watanabe Kouji (Kawasaki JPX), Mounting device for mounting an electronic device on a substrate by the surface mounting technology.
  33. Martens John D. (Plano TX) Ammon J. Preston (Dallas TX), Multi row high density connector.
  34. Feng Bai-Cwo (Tarrytown NY) Feng George C. (Fishkill NY) McMaster Richard H. (Wappingers Falls NY), Multi-layer package incorporating a recessed cavity for a semiconductor chip.
  35. Koepke Richard A. (New Bedford MA), Multi-path feed-thru lead and method for formation thereof.
  36. Hirano Naohiko (Yokohama JPX), Multilayer package.
  37. Tillotson John (Southfield MI), Multiple contact header assembly.
  38. Buck Jonathan E. (Harrisburg PA) Rose William H. (Harrisburg PA), Paired contact electrical connector system.
  39. Row Edward J. (Mountain View CA) Boucher Laurence B. (Saratoga CA) Pitts William M. (Los Altos CA) Blightman Stephen E. (San Jose CA), Parallel I/O network file server architecture.
  40. Methvin David H. (Boulder CO) Un Chong S. (Anaheim CA), Parallel string processor and method for a minicomputer.
  41. Shirling David J. (Waterbury CT), Pin grid array having seperate posts and socket contacts.
  42. Ammon J. Preston (Dallas TX) Weaver Harry R. (Dallas TX) Evans Evan J. (Plano TX), Printed circuit board finger connector.
  43. Cnyrim Henner (Laatzen DEX) Felsen Peter (Wennigsen DEX), Printed circuit board for carrying a mixed-component assembly.
  44. Brown Candice H. (San Jose CA), Process of making a semiconductor device having parallel leads directly connected perpendicular to integrated circuit la.
  45. Bittorf Bradley J. (Shaker Heights OH) Flood Mark A. (Mayfield Heights OH) Kalan Michael D. (Mayfield Heights OH) Sepsi Robert R. (Richmond Heights OH), Programmable controller with a dual intermodule message system.
  46. Laut Marvin (Dracut MA), Ring-connected circuit module assembly.
  47. Arima Hideo (Yokohama JPX) Takeda Kenji (Kamakura JPX) Yamamura Hideho (Yokohama JPX) Kobayashi Fumiyuki (Sagamihara JPX), Semiconductor chip carrier, module having same chip carrier mounted therein, and electronic device incorporating same mo.
  48. Jurista Thomas M. (Vestal NY) Mantilla Osvaldo A. (Endicott NY), Sequential Connecting device.
  49. Cady James W. (Austin TX), Simulcast standard multichip memory addressing system.
  50. Lavan Thomas J. (El Toro CA), Single inline memory module support system.
  51. Juskey Frank J. (Coral Springs FL) Suppelsa Anthony B. (Coral Springs FL), Thermally conductive integrated circuit package with radio frequency shielding.
  52. Crane ; Jr. Stanford W. (Cincinnati OH), Ultra-high density electrical interconnect system.

이 특허를 인용한 특허 (21) 인용/피인용 타임라인 분석

  1. Meier Matthias ; Babb Samuel M. ; Allan Scott P., Adaptive PCI slot.
  2. Aguinaga, Jr., Salvador; Dipert, Dwight; Schwan, Martin, Backplane apparatus and board for use therewith.
  3. Liu, Fangming; Zhang, Guodong; Liu, Sang, Backplane apparatus and communication device.
  4. Crane, Jr., Stanford W.; Portuondo, Maria M.; Erickson, Willard; Bizzarri, Maurice, Backplane system having high-density electrical connectors.
  5. Crane, Jr.,Stanford W., Backplane system having high-density electrical connectors.
  6. Thane M. Larson ; Kirk Bresniker, CompactPCI-based computer system with mid-plane connector for equivalent front and back loading.
  7. Garnett, Paul J; Heffernan, Peter, Computer connections.
  8. MacLaren John M. ; Hausauer Brian ; Rajagopaian Usha, Computer expansion slot and associated logic for automatically detecting compatibility with an expansion card.
  9. Crane ; Jr. Stanford W. ; Portuondo Maria M. ; Erickson Willard ; Bizzarri Maurice, Computer system having a modular architecture.
  10. Henneberg, Wolf Neumann, Connection contact for establishing electrical contact in a circuit board or a lead frame.
  11. Araki, Katsuhiko, Control system and control method.
  12. Debord, Pierre; Glaise, Rene; Gomez, Claude, Fragmented backplane system for I/O applications.
  13. Debord, Pierre; Glaise, Rene; Gomez, Claude, Fragmented backplane system for I/O applications.
  14. Crane ; Jr. Stanford W. ; Krishnapura Lakshminarasimha ; Fuoco Daniel ; Lee Roy K. ; Link Kevin J. ; Behar Moises ; Dutta Arindum ; Cross William, Interface optimized computer system architecture.
  15. Crane, Jr., Stanford W., Modular architecture for high bandwidth computers.
  16. Hogerl, Jurgen, Module unit for memory modules and method for its production.
  17. Perino Donald V. ; Gamini Nader, Multi-slot connector with integrated bus providing contact between adjacent modules.
  18. Haba, Belgacem; Perego, Richard E.; Nguyen, David; Garrett, Jr., Billy W.; Tsern, Ely; Hampel, Craig E.; Yip, Wai-Yeung, Multiple channel modules and bus systems using same.
  19. Haba,Belgacem; Perego,Richard E.; Nguyen,David; Garrett, Jr.,Billy W.; Tsern,Ely; Hampel,Crag E.; Yip,Wai Yeng, Multiple channel modules and bus systems using same.
  20. Summers Mark David ; Cohlman Donald Charles ; Sharrit John Paul ; Cornils Curtis Lee, Secure bus arbiter interconnect arrangement.
  21. Goldys John J. ; Bloomer Charles T., Small computer system interface (SCSI) bus backplane interface.

활용도 분석정보

상세보기
다운로드
내보내기

활용도 Top5 특허

해당 특허가 속한 카테고리에서 활용도가 높은 상위 5개 콘텐츠를 보여줍니다.
더보기 버튼을 클릭하시면 더 많은 관련자료를 살펴볼 수 있습니다.

섹션별 컨텐츠 바로가기

AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

AI-Helper 아이콘
AI-Helper
안녕하세요, AI-Helper입니다. 좌측 "선택된 텍스트"에서 텍스트를 선택하여 요약, 번역, 용어설명을 실행하세요.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.

선택된 텍스트

맨위로