$\require{mediawiki-texvc}$

연합인증

연합인증 가입 기관의 연구자들은 소속기관의 인증정보(ID와 암호)를 이용해 다른 대학, 연구기관, 서비스 공급자의 다양한 온라인 자원과 연구 데이터를 이용할 수 있습니다.

이는 여행자가 자국에서 발행 받은 여권으로 세계 각국을 자유롭게 여행할 수 있는 것과 같습니다.

연합인증으로 이용이 가능한 서비스는 NTIS, DataON, Edison, Kafe, Webinar 등이 있습니다.

한번의 인증절차만으로 연합인증 가입 서비스에 추가 로그인 없이 이용이 가능합니다.

다만, 연합인증을 위해서는 최초 1회만 인증 절차가 필요합니다. (회원이 아닐 경우 회원 가입이 필요합니다.)

연합인증 절차는 다음과 같습니다.

최초이용시에는
ScienceON에 로그인 → 연합인증 서비스 접속 → 로그인 (본인 확인 또는 회원가입) → 서비스 이용

그 이후에는
ScienceON 로그인 → 연합인증 서비스 접속 → 서비스 이용

연합인증을 활용하시면 KISTI가 제공하는 다양한 서비스를 편리하게 이용하실 수 있습니다.

Power control for mobile electronics using no-operation instructions 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H02J-003/16
출원번호 US-0563493 (1995-11-28)
발명자 / 주소
  • Jackson Robert T.
출원인 / 주소
  • Intel Corporation
대리인 / 주소
    Blakely, Sokoloff, Taylor & Zafman
인용정보 피인용 횟수 : 133  인용 특허 : 7

초록

A system for regulating power in a mobile electronics device uses "hint" NOP instructions having a reserved field of bits that generate control signals to affect an increase or decrease in power dissipation. The control signals raise or lower the operating potential provided by a power supply and al

대표청구항

[ I claim:] [1.] A system for regulating power comprising:a power supply for providing an operating potential coupled to a processor, the power supply having an adjustable operating potential adjusted in response to a first control signal;a signal generator for providing a clock signal coupled to th

이 특허에 인용된 특허 (7)

  1. Bland Patrick M. (Delray Beach FL) Jackson Robert T. (Boyhton Beach FL) Joshi Jayesh (Santa Clara CA) Kardach James (San Jose CA), CPU clock control unit.
  2. Harper Leroy D. (Sunnyvale CA) Schlichting Grayson C. (Cupertino CA) Hooks Douglas A. (Sunnyvale CA) Cullimore Ian H. S. (Palo Alto CA) Bradshaw Gavin A. (Cupertino CA) Banerjee Biswa R. (San Jose CA, Computer power management system.
  3. Gettel Steven K. (Austin TX), Computer with transparent power-saving manipulation of CPU clock.
  4. Keen Harry J. (Lyndonville VT) Thomas Haydon C. (Waterford VT), Electronic measuring system with pulsed power supply and stability sensing.
  5. Sites Richard L. (Boylston MA) Witek Richard T. (Littleton MA), In-register data manipulation for unaligned byte write using data shift in reduced instruction set processor.
  6. Keen Harry J. (St. Johnsbury VT) Saucier Leon E. (South Rygate VT), Low power electronic measuring system.
  7. Matter Eugene P. (Folsom CA) Sotoudeh Yahya S. (Santa Clara CA) Mathews Gregory S. (Boca Raton FL), Method and apparatus for independently stopping and restarting functional units.

이 특허를 인용한 특허 (133)

  1. Sheng, Eric Chen Li; Ward, Matthew Robert, Adaptive control of operating and body bias voltages.
  2. Sheng, Eric Chen-Li; Ward, Matthew Robert, Adaptive control of operating and body bias voltages.
  3. Sheng, Eric Chen-Li; Ward, Matthew Robert, Adaptive control of operating and body bias voltages.
  4. Halepete, Sameer; Anvin, H. Peter; Chen, Zongjian; D'Souza, Godfrey P.; Fleischmann, Marc; Klayman, Keith; Lawrence, Thomas; Read, Andrew, Adaptive power control.
  5. Halepete, Sameer; Anvin, H. Peter; Chen, Zongjian; D'Souza, Godfrey P.; Fleischmann, Marc; Klayman, Keith; Lawrence, Thomas; Read, Andrew, Adaptive power control.
  6. Halepete, Sameer; Anvin, H. Peter; Chen, Zongjian; D'Souza, Godfrey P.; Fleischmann, Marc; Klayman, Keith; Lawrence, Thomas; Read, Andrew, Adaptive power control.
  7. Halepete,Sameer; Anvin,H. Peter; Chen,Zongjian; D'Souza,Godfrey P.; Fleischmann,Marc; Klayman,Keith; Lawrence,Thomas; Read,Andrew, Adaptive power control.
  8. Read, Andrew; Wing, Malcolm; Kordus, Louis C.; Stewart, Thomas E., Adaptive power control based on pre package characterization of integrated circuits.
  9. Read,Andrew; Wing,Malcolm; Kordus,Louis C.; Stewart,Thomas E., Adaptive power control based on pre package characterization of integrated circuits.
  10. Finkelstein,Lev; Rotem,Efraim; Lamdan,Oren; Cohen,Aviad, Adaptive thermal-based frequency-bounds control.
  11. Sheng, Eric Chien-Li; Kawasumi, Steven, Adaptive voltage control by accessing information stored within and specific to a microprocessor.
  12. Jones, Darren M., Apparatus and method for software specified power management performance using low power virtual threads.
  13. Nobutaka Nishigaki JP, Apparatus for controlling internal heat generating circuit.
  14. Rusu, Stefan; Tam, Simon M., Apparatus for thermal management of multiple core microprocessors.
  15. Rusu,Stefan; Tam,Simon M., Apparatus for thermal management of multiple core microprocessors.
  16. Terechko, Andrei; Garg, Manish, Arrangement and method for controlling power modes of hardware resources.
  17. Terechko,Andrei; Garg,Manish, Arrangement and method for controlling power modes of hardware resources.
  18. Beard, Paul, Battery powered device with dynamic power and performance management.
  19. Beard,Paul, Battery powered device with dynamic power and performance management.
  20. Howard, Derek Lee; Broyles, Martha Ann; Wendling, Peter Adam; Harrington, Raymond J; Rosedahl, Todd Jon, Changing processor performance from a throttled state during a power supply failure.
  21. May, Michael Robert, Circuit devices and methods of providing a regulated power supply.
  22. Inoue Naoyuki,JPX, Clock modifying method and information processing apparatus which gradually increase frequency of an external clock to be supplied to processing unit.
  23. Koniaris, Kleanthes G.; Burr, James B., Closed loop feedback control of integrated circuits.
  24. Koniaris,Kleanthes G.; Burr,James B., Closed loop feedback control of integrated circuits.
  25. Koniaris,Kleanthes G.; Burr,James B., Closed loop feedback control of integrated circuits.
  26. Osborn, Neal A.; Canova, Francis J., Dynamic performance adjustment of computation means.
  27. Linderman Mark H., Dynamic power management of systems.
  28. de Cesare, Joshua; Andrews, Jonathan Jay, Dynamic voltage dithering.
  29. de Cesare, Joshua; Andrews, Jonathan Jay, Dynamic voltage dithering.
  30. Datar, Rajendra; Ghanekar, Sachin; Gogte, Ravindra; Gracias, Sebastian, Dynamically activating and deactivating selected circuit blocks of a data processing integrated circuit during execution of instructions according to power code bits appended to selected instructions.
  31. Nattkemper, Dieter H., Element management system for managing line-powered network elements.
  32. Chen, Tien-Min, Feedback-controlled body-bias voltage source.
  33. Chen, Tien-Min, Feedback-controlled body-bias voltage source.
  34. Sotomayor, Jr., Guy G.; Cox, Keith; Conroy, David G.; Culbert, Michael, Forced idle of a data processing system.
  35. Koniaris, Kleanthes G.; Burr, James B., Frequency specific closed loop feedback control of integrated circuits.
  36. Koniaris, Kleanthes G.; Burr, James B., Frequency specific closed loop feedback control of integrated circuits.
  37. Koniaris, Kleanthes G.; Burr, James B., Frequency specific closed loop feedback control of integrated circuits.
  38. Koniaris, Kleanthes G.; Burr, James B., Frequency specific closed loop feedback control of integrated circuits.
  39. Koniaris,Kleanthes G.; Burr,James B., Frequency specific closed loop feedback control of integrated circuits.
  40. Koniaris,Kleanthes G.; Burr,James B., Frequency specific closed loop feedback control of integrated circuits.
  41. Van Der Voort,Ronald Hans; Deurloo,Oscar Jan, Gas discharge lamp driving circuit and method with resonating sweep voltage.
  42. Allen, Roger L.; Coon, Brett W.; Buck, Ian A.; Nickolls, John R., Generating event signals for performance register control using non-operative instructions.
  43. Yamada,Tetsuya; Hayashi,Tomoichi; Nakano,Sadaki; Tsunoda,Takanobu; Nishii,Osamu, Halting clock signals to input and result latches in processing path upon fetching of instruction not supported.
  44. Johnson, Stephen B., IO based embedded processor clock speed control.
  45. Reddy, Sreenivas Aerra; Arulanandam, Srinivasan; Rajaraman, Venkataraman, Maintaining optimum voltage supply to match performance of an integrated circuit.
  46. Alvar Antonio Dean ; Patrick Edward Perry ; Sebastian Theodore Ventrone, Managing VT for reduced power using power setting commands in the instruction stream.
  47. Claude Louis Bertin ; Alvar Antonio Dean ; Kenneth Joseph Goodnow ; Scott Whitney Gould ; Wilbur David Pricer ; William Robert Tonti ; Sebastian Theodore Ventrone, Managing Vt for reduced power using a status table.
  48. Samson, Eric C., Managing power consumption by requesting an adjustment to an operating point of a processor.
  49. Nattkemper,Dieter H.; Phillips,Melvin Richard; Walker, III,Kenneth L., Managing power in a line powered network element.
  50. Hofmann, Richard Gerard; Bridges, Jeffrey Todd, Method and apparatus for adaptive voltage scaling based on instruction usage.
  51. Oh, Jang Geun; Lee, Sang Ho, Method and apparatus for adjusting a performance state of a processor resource.
  52. Oh,Jang Geun; Lee,Sang Ho, Method and apparatus for adjusting clock throttle rate based on usage of CPU.
  53. Nishigaki,Nobutaka; Ninomiya,Ryoji; Sakai,Makoto, Method and apparatus for controlling internal heat generating circuit.
  54. Marcus W. May ; Daniel Mulligan, Method and apparatus for controlling power consumption of an integrated circuit.
  55. Williams,Emrys J., Method and apparatus for controlling the power consumption of a semiconductor device.
  56. Samson,Eric C.; Navale,Aditya; Cline,Leslie E., Method and apparatus for dynamic DLL powerdown and memory self-refresh.
  57. Oh, Jang Geun; Lee, Sang Ho, Method and apparatus for operating a computer system by adjusting a performance state of a processor resource.
  58. Girson,Andrew; Donskoy,Boris; Tennies,Nathan, Method and apparatus for optimizing performance and battery life of electronic devices based on system and application parameters.
  59. Feierbach,Gary F., Method and apparatus for saving power in pipelined processors.
  60. Williams,Emrys J., Method and apparatus for supplying power in electronic equipment.
  61. Adachi,Mitsuhiro, Method and apparatus for thermal throttling of clocks using localized measures of activity.
  62. Huang, Jensen; Diard, Franck; Saulters, Scott, Method and system for artificially and dynamically limiting the framerate of a graphics processing unit.
  63. Svilan, Vjekoslav; Chen, Tien-Min; Koniaris, Kleanthes G.; Burr, James B., Method and system for latchup suppression.
  64. Park, Ki Yeon; Jang, Se Young; Yun, Chul Eun, Method for controlling temperature of terminal and terminal supporting the same.
  65. Cox, Keith; Kapoor, Gaurav; Arnold, Vaughn, Method for estimating temperature at a critical point.
  66. Cox, Keith; Kapoor, Gaurav; Arnold, Vaughn, Method for estimating temperature at a critical point.
  67. Lee, Sang Ho; Oh, Jang Keun, Method for measuring quantity of usage of CPU.
  68. Lee, Sang Ho; Oh, Jang Keun, Method for measuring quantity of usage of CPU.
  69. Lee,Sang Ho; Oh,Jang Keun, Method for measuring quantity of usage of CPU.
  70. William Brent Wilson CA, Method for reducing processing power requirements of a video decoder.
  71. Wilson,William Brent, Method for reducing processing power requirements of a video decoder.
  72. Jun, Sung Ik; An, Baik Song; On, Jin Ho; Woo, Young Choon; Choi, Wan, Method of dynamically controlling power in multicore environment.
  73. Burnet, Craig; Kelin, Timur; Hsu, Chia-Chun, Method, system and apparatus for controlling power consumption of a mobile terminal.
  74. Culbert, Michael; Cox, Keith Alan; Howard, Brian; de Cesare, Josh; Williams, Richard Charles; Falkenburg, Dave Robbins; Huang, Daisie Iris; Radcliffe, David, Methods and apparatuses for controlling the temperature of a data processing system.
  75. Conroy, David G.; Culbert, Michael; Cox, Keith A., Methods and apparatuses for determining throttle settings to satisfy a system power constraint.
  76. Conroy, David G.; Cox, Keith Alan; Culbert, Michael, Methods and apparatuses for dynamic power control.
  77. Conroy, David G.; Cox, Keith Alan; Culbert, Michael, Methods and apparatuses for dynamic power control.
  78. Conroy, David G.; Culbert, Michael; Cox, Keith A., Methods and apparatuses for dynamic power control.
  79. Conroy, David G.; Culbert, Michael; Cox, Keith A., Methods and apparatuses for dynamic power control.
  80. Conroy, David G.; Culbert, Michael; Cox, Keith A., Methods and apparatuses for dynamic power control.
  81. Conroy, David G.; Culbert, Michael; Cox, Keith A., Methods and apparatuses for dynamic power control.
  82. Conroy, David G.; Culbert, Michael; Cox, Keith A., Methods and apparatuses for dynamic power control.
  83. Conroy, David G.; Cox, Keith Alan; Culbert, Michael, Methods and apparatuses for dynamic thermal control.
  84. Conroy, David G.; Culbert, Michael; Cox, Keith A., Methods and apparatuses for managing power by leveraging intermediate power margins.
  85. Culbert, Michael; Cox, Keith Alan; Howard, Brian; de Cesare, Josh; Williams, Richard Charles; Falkenburg, Dave Robbins; Huang, Daisie Iris; Radcliffe, David, Methods and apparatuses for operating a data processing system.
  86. Diard, Franck; Kadaba, Ganesh, Methods and system for artifically and dynamically limiting the display resolution of an application.
  87. Adachi, Mitsuhiro, Methods of clock throttling in an integrated circuit.
  88. Kondo,Shuji, Microcontroller for fetching and decoding a frequency control signal together with an operation code.
  89. Smit Willem ; Dippenaar Theodor Johannes ; Schieke Pieter, Microprocessor power supply system including a programmable power supply and a programmable brownout detector.
  90. Saulsbury Ashley ; Rice Daniel S., Microprocessor with reduced context switching overhead and corresponding method.
  91. Li, Sau Yan Keith; Dewey, Thomas Edward; Jamkar, Saket Arun; Parikh, Amit, Power consumption reduction systems and methods.
  92. Frid, Aleksandr; Sriram, Parthasarathy, Power management with dynamic frequency adjustments.
  93. Frid, Aleksandr; Sriram, Parthasarathy, Power management with dynamic frequency adjustments.
  94. Johnson, Stephen B., Power monitoring and reduction for embedded IO processors.
  95. Chen, Tien-Min, Precise control component for a substarate potential regulation circuit.
  96. Chen, Tien-Min, Precise control component for a substrate potential regulation circuit.
  97. Chen, Tien-Min, Precise control component for a substrate potential regulation circuit.
  98. Kelleher, Brian M.; Mimberg, Ludger; Kranzusch, Kevin; Lam, John; Velmurugan, Senthil S., Processor performance adjustment system and method.
  99. Alben, Jonah M.; Kranzusch, Kevin, Processor temperature adjustment system and method.
  100. Alben, Jonah M.; Kranzusch, Kevin, Processor voltage adjustment system and method.
  101. Smit,Willem; Dippenaar,Theodor Johannes; Schieke,Pieter, Programmable power supply and brownout detector for electronic equipment.
  102. Smit, Willem; Dippenaar, Theodor Johannes; Schieke, Pieter, Programmable power supply and brownout detector method for a microprocessor power supply.
  103. Fleischmann, Marc; Anvin, H. Peter, Restoring processor context in response to processor power-up.
  104. Read, Andrew; Halepete, Sameer; Klayman, Keith, Saving power when in or transitioning to a static mode of a processor.
  105. Read,Andrew; Halepete,Sameer; Klayman,Keith, Saving power when in or transitioning to a static mode of a processor.
  106. Read, Andrew; Halepete, Sameer; Klayman, Keith, Saving power when in or transitioning to a static mode of a processor by using feedback-configured voltage regulator.
  107. May, Michael R.; May, Marcus William, Semiconductor device and system and method of crystal sharing.
  108. Chen, Tien-Min, Servo loop for well bias voltage source.
  109. Allen, Roger L.; Coon, Brett W., Shader performance registers.
  110. Paravada, Surendra; Boenapalli, Madhu Yashwanth; Mokkapati, Venu Madhav, Smart handling of input/output interrupts.
  111. Chen, Tien-Min; Fu, Robert, Stabilization component for a substrate potential regulation circuit.
  112. Mark William Kuemerle, System and method for power optimization in parallel units.
  113. Fleischmann, Marc; Anvin, H. Peter, System and method for saving and restoring a processor state without executing any instructions from a first instruction set.
  114. Launiainen,Aki, System for controlling operation of a processor based on information contained within instruction word.
  115. Qureshi, Qadeer Ahmad; Mitchell, Charles Weldon; Casto, James John, System for specifying core voltage for a microprocessor by selectively outputting one of a first, fixed and a second, variable voltage control settings from the microprocessor.
  116. Fu, Robert; Chen, Tien-Min, System for substrate potential regulation during power-up in integrated circuits.
  117. Fu, Robert; Chen, Tien-Min, System for substrate potential regulation during power-up in integrated circuits.
  118. Park, Jong Lae; Lee, Woo Jin; Park, Sang Il; Lee, Gyeong Teak, System on chip method thereof, and device including the same.
  119. Masleid, Robert Paul; Burr, James B., Systems and methods for adjusting threshold voltage.
  120. Masleid, Robert Paul; Burr, James B., Systems and methods for adjusting threshold voltage.
  121. Masleid, Robert Paul; Burr, James B., Systems and methods for adjusting threshold voltage.
  122. Masleid, Robert Paul; Burr, James B., Systems and methods for adjusting threshold voltage.
  123. Koniaris, Kleanthes G.; Burr, James B., Systems and methods for integrated circuits comprising multiple body bias domains.
  124. Koniaris, Kleanthes G.; Masleid, Robert Paul; Burr, James B., Systems and methods for integrated circuits comprising multiple body biasing domains.
  125. Koniaris, Kleanthes G.; Masleid, Robert Paul; Burr, James B., Systems and methods for integrated circuits comprising multiple body biasing domains.
  126. Koniaris, Kleanthes G.; Masleid, Robert Paul; Burr, James B., Systems and methods for integrated circuits comprising multiple body biasing domains.
  127. Koniaris, Kleanthes G.; Masleid, Robert Paul; Burr, James B., Systems and methods for integrated circuits comprising multiple body biasing domains.
  128. Conroy, David G.; Culbert, Michael; Cox, Keith A., Thermal control arrangement for a data processing system.
  129. Bhatia, Rakesh; Reinhardt, Dennis; Cooper, Barnes, Thermal management in a system.
  130. Lee W. Atkinson, Thermal management of computers.
  131. Cox, Keith; Just, Andrew Bradley; Watson, Matthew G.; Albert, Eric; Powers, David Matthew; West, Daniel Ariel; Novotney, Donald J.; Culbert, Michael F., Thermal management techniques in an electronic device.
  132. Cox, Keith; Just, Andrew Bradley; Watson, Matthew G.; Albert, Eric; Powers, David; West, Daniel Ariel; Novotney, Donald J.; Culbert, Michael F., Thermal management techniques in an electronic device.
  133. Read, Andrew; Halepete, Sameer; Klayman, Keith, Transitioning to and from a sleep state of a processor.
섹션별 컨텐츠 바로가기

AI-Helper ※ AI-Helper는 오픈소스 모델을 사용합니다.

AI-Helper 아이콘
AI-Helper
안녕하세요, AI-Helper입니다. 좌측 "선택된 텍스트"에서 텍스트를 선택하여 요약, 번역, 용어설명을 실행하세요.
※ AI-Helper는 부적절한 답변을 할 수 있습니다.

선택된 텍스트

맨위로