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Method and apparatus for pseudo-direct access to embedded memories of a micro-controller integrated circuit via the IEEE 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-011/00
  • G06F-015/16
출원번호 US-0633930 (1996-04-12)
발명자 / 주소
  • Eskandari Nick G.
  • Sprague David D.
출원인 / 주소
  • Intel Corporation
대리인 / 주소
    Blakely, Sokoloff, Taylor & Zafman
인용정보 피인용 횟수 : 105  인용 특허 : 0

초록 ▼

A method and apparatus are provided for testing memory locations of embedded memories or on-board caches of a micro-controller, a micro-processor or a CPU-based integrated circuit through use of a test access port (TAP) such as the IEEE TAP described in "IEEE Standard Test Access Port and Boundary-S

대표청구항 ▼

[ We claim:] [3.] An apparatus for performing read and write operations to an embedded memory of an integrated circuit, the integrated circuit including a CPU one or more internal registers, and a memory interface unit with an access circuitry which provides access to the embedded memory via the mem

이 특허를 인용한 특허 (105)

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