초록 ▼

A method of recovering a clock signal which is embedded in an incoming data stream. The method includes the steps of providing the incoming data stream to a data sampler circuit, first operating the data sampler circuit to select one of a plurality of clock phases wherein the selected clock phase is

A method of recovering a clock signal which is embedded in an incoming data stream. The method includes the steps of providing the incoming data stream to a data sampler circuit, first operating the data sampler circuit to select one of a plurality of clock phases wherein the selected clock phase is indicative of the embedded clock signal, generating a recovered clock signal based on the selected clock phase, second operating a retiming circuit in a normal data tracking mode to retime the incoming data stream based on the recovered clock signal, and disabling operation of the data sampler circuit while the retiming circuit is operating in the normal data tracking mode. An apparatus for recovering a clock signal which is embedded in an incoming data stream is also disclosed.

대표청구항 ▼

[ What is claimed is:] [1.] A method of recovering a clock signal which is embedded in an incoming data stream, comprising the steps of:providing the incoming data stream to a data sampler circuit;operating the data sampler circuit to select one of a plurality of clock phases, the selected clock pha

[ What is claimed is:] [1.] A method of recovering a clock signal which is embedded in an incoming data stream, comprising the steps of:providing the incoming data stream to a data sampler circuit;operating the data sampler circuit to select one of a plurality of clock phases, the selected clock phase being indicative of the embedded clock signal;generating a recovered clock signal based on the selected clock phase;retiming the incoming data stream based on the recovered clock signal; anddisabling operation of the data sampler circuit immediately after the one of the plurality of clock phases is selected.