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TFT with reduced channel length and parasitic capacitance 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-029/786
출원번호 US-0887899 (1997-07-03)
발명자 / 주소
  • Gu Tieer
  • Boer Willem den
출원인 / 주소
  • OIS Optical Imaging Systems, Inc.
대리인 / 주소
    Rhoa
인용정보 피인용 횟수 : 30  인용 특허 : 23

초록

A thin film transistor (TFT) for a liquid crystal display (LCD) and method of making same is disclosed, the TFT having a source and drain electrode where at least one of the source and drain includes first and second conductive layers offset from one another by a distance .DELTA.L so that the result

대표청구항

[ We claim:] [1.] A thin film transistor comprising:a gate electrode;a source electrode;a drain electrode;wherein one of said source and drain electrodes includes first and second conductive layers offset with respect to one another; andwherein a thin film transistor channel length L.sub.T of the tr

이 특허에 인용된 특허 (23)

  1. Janai Meir I. (Haifa ILX), Active matrix display panel having connectable secondary switches.
  2. Katayama Mikio (Nara JPX) Tanaka Hirohisa (Nara JPX) Shimada Yasunori (Nara JPX) Morimoto Hiroshi (Nara JPX), Active matrix substrate for liquid crystal display.
  3. Tanaka Sakae (Tokyo JPX) Watanabe Yoshiaki (Tokyo JPX), Amorphous-silicon thin film transistor array substrate.
  4. Aoki Shigeo (Habikino JPX) Tamamura Junichi (Yao JPX) Ukai Yasuhiro (Yao JPX), Liquid crystal display device.
  5. Tanaka Sakae (Tokyo JPX) Watanabe Yoshiaki (Tokyo JPX) Shirai Katsuo (Tochigi JPX) Ogiwara Yoshihisa (Tochigi JPX), Method for producing a silicon thin film transistor.
  6. Tanaka Sakae (Tokyo JPX) Watanabe Yoshiaki (Tokyo JPX), Method for producing amorphous silicon thin film transistor array substrate.
  7. den Boer Willem (Troy MI) Gu Tieer (Troy MI), Method of fabricating a TFT with reduced channel length.
  8. Gu Tieer (Troy MI) den Boer Willem (Troy MI), Method of making a TFT having a reduced channel length.
  9. Takeda Mamoru (Hirakata JPX) Yamashita Ichiro (Katano JPX) Kitahiro Isamu (Yawata JPX), Method of manufacturing a thin film transistor using positive and negative photoresists.
  10. Holmberg Scott H. (Pleasanton CA), Method of manufacturing flat panel backplanes including redundant gate lines and displays made thereby.
  11. Whetten Nathan R. (Ballston Lake NY), Multi-layer address lines for amorphous silicon liquid crystal display devices.
  12. Wei Ching-Yeu (Schenectady NY) Possin George E. (Schenectady NY) Kwasnick Robert F. (Schenectady NY), Positive control of the source/drain-gate overlap in self-aligned TFTS via a top hat gate electrode configuration.
  13. Wu Biing-Seng (Hsin-Chu TWX), Structure of high yield thin film transistors.
  14. den Boer Willem (Troy MI) Gu Tieer (Troy MI), TFT with reduced channel length and method of making same.
  15. den Boer Willem (Troy MI) Yang Mohshi (Troy MI), TFT with reduced parasitic capacitance.
  16. Sasano Akira (Tokyo JPX) Seki Kouichi (Hachioji JPX) Yamamoto Hideaki (Tokorozawa JPX) Baji Toru (Kodaira JPX) Tsukada Toshihisa (Tokyo JPX), Thin film device.
  17. Shoji Hajime (1-2-43 Wakaehigashimachi ; Higashiosaka-shi ; Osaka JPX) Watanabe Noriko (5-8 ; Sanjo-soekawa-cho Nara-shi ; Nara-ken JPX) Hamada Hiroshi (177 ; Aoyama 7-chome Nara-shi ; Nara-ken JPX) , Thin film semiconductor device and liquid crystal display apparatus using thereof.
  18. Aoyama Takashi (Ibaraki JPX) Ogawa Kazuhiro (Hitachi JPX) Mochizuki Yasuhiro (Katsuta JPX) Momma Naohiro (Hitachi JPX) Usami Katsuhisa (Hitachi JPX), Thin film semiconductor device having inverted stagger structure, and device having such semiconductor device.
  19. Wakai Haruo (Fussa JPX) Yamamura Nobuyuki (Hachioji JPX) Sato Syunichi (Kawagoe JPX) Kanbara Minoru (Hachioji JPX), Thin film transistor.
  20. den Boer Willem (Troy MI) Gu Tieer (Troy MI), Thin film transistor with reduced channel length for liquid crystal displays.
  21. Mori Hisatoshi (Fussa JPX) Yamamura Nobuyuki (Hanno JPX), Thin film transistors without capacitances between electrodes thereof.
  22. Koden Mitsuhiro (Nara JPX), Thin-film transistor.
  23. Busta Heinz H. (Park Ridge IL), Vertical gate thin film transistors in liquid crystal array.

이 특허를 인용한 특허 (30)

  1. Lai, Han-Chung, Active matrix substrate for a liquid crystal display and method of forming the same.
  2. Lai, Han-Chung, Active matrix substrate for a liquid crystal display and method of forming the same.
  3. Liu, Xiang; Yoo, Seongyeol; Xue, Jianshe, Array substrate and manufacturing method thereof.
  4. Park, Sang Jin, Array substrate, manufacturing method thereof and liquid crystal display.
  5. Trujillo, Jovan; Moyer, Curtis, Electronic display test device and related method.
  6. Bayraktaroglu, Burhan; Leedy, Kevin D, Fabrication method for multi-zoned and short channel thin film transistors.
  7. Gu, Tieer; den Boer, Willem, LCD with increased pixel opening sizes.
  8. Gu, Tieer; den Boer, Willem, LCD with increased pixel opening sizes.
  9. Kaneko, Toshiki; Ono, Kikuo; Ikeda, Hajime; Terakado, Masatomo, Liquid crystal display device having conductive lines formed with amorphous oxide conductive layer on metal layer and method of fabrication thereof.
  10. Ban Atsushi,JPX ; Suzuki Hisataka,JPX ; Okamoto Masaya,JPX, Manufacturing method of a thin-film transistor of a reverse staggered type.
  11. Bayraktaroglu, Burhan; Leedy, Kevin D, Metal oxide thin film transistor fabrication method.
  12. Ting-Hui Huang TW; Jr-Hong Chen TW, Method for fabricating high aperture ratio TFT's and devices formed.
  13. Bayraktaroglu, Burhan, Method of fabricating ultra short gate length thin film transistors using optical lithography.
  14. Watanabe, Masahiro; Mashiyama, Mitsuo; Handa, Takuya; Okazaki, Kenichi; Yamazaki, Shunpei, Oxide semiconductor thin film transistor including oxygen release layer.
  15. Yamazaki,Shunpei; Nakajima,Setsuo; Kawasaki,Ritsuko, Semiconductor device and a method of manufacturing the same.
  16. Akimoto, Kengo; Sakata, Junichiro; Yamazaki, Shunpei, Semiconductor device and manufacturing method for the same.
  17. Akimoto, Kengo; Sakata, Junichiro; Yamazaki, Shunpei, Semiconductor device and manufacturing method for the same.
  18. Akimoto, Kengo; Sakata, Junichiro; Yamazaki, Shunpei, Semiconductor device and manufacturing method for the same.
  19. Akimoto, Kengo; Sakata, Junichiro; Yamazaki, Shunpei, Semiconductor device and manufacturing method for the same.
  20. Yamazaki, Shunpei; Koyama, Jun; Nakajima, Setsuo, Semiconductor device and method of fabricating the same.
  21. Yamazaki,Shunpei; Nakajima,Setsuo; Kawasaki,Ritsuko, Semiconductor device provided with semiconductor circuit made of semiconductor element and method of fabricating the same.
  22. Yamazaki, Shunpei; Takayama, Toru; Sato, Keiji, Sputtering target and manufacturing method thereof, and transistor.
  23. Yamazaki, Shunpei; Takayama, Toru; Sato, Keiji, Sputtering target and manufacturing method thereof, and transistor.
  24. Yamazaki, Shunpei; Takayama, Toru; Sato, Keiji, Sputtering target and manufacturing method thereof, and transistor.
  25. den Boer Willem ; Zhong John Z. Z. ; Gu Tieer, TFT array with photo-imageable insulating layer over address lines.
  26. Liu, Xiang, TFT-LCD array substrate manufacturing method.
  27. Hwang, Kwang-Jo, Thin film transistor having a short channel formed by using an exposure mask with slits.
  28. Hwang,Kwang Jo, Thin film transistor having a short channel formed by using an exposure mask with slits.
  29. Kim, Pyung Hun, Thin film transistor of liquid crystal display device with specified channel W/L ratio.
  30. Ukita Tooru,JPX, Thin film transistor substrate having low resistive and chemical resistant electrode interconnections and method of forming the same.
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