초록 ▼

A decoupling capacitor for an integrated circuit and method of forming the same. The decoupling capacitor includes a p-channel device having first and second p-type doped diffusion regions, a device channel region therebetween, a device gate overlying the device channel region, and a gate insulator

A decoupling capacitor for an integrated circuit and method of forming the same. The decoupling capacitor includes a p-channel device having first and second p-type doped diffusion regions, a device channel region therebetween, a device gate overlying the device channel region, and a gate insulator separating the device gate and channel region. The first and second diffusion regions are electrically connected to a positive power supply, and the device gate is electrically connected to a negative power supply. The decoupling capacitor may be formed proximate a signal driver in the integrated circuit. The decoupling capacitor may be formed without additional, expensive semiconductor fabrication steps and operates to minimize noise in the circuit.

대표청구항 ▼

[ What is claimed is:] [1.] An integrated circuit comprising:a semiconductor substrate;decoupled circuitry formed in said semiconductor substrate; and,an integral decoupling capacitor formed in said semiconductor substrate and disposed in close proximity to a positive and a negative power supply con

[ What is claimed is:] [1.] An integrated circuit comprising:a semiconductor substrate;decoupled circuitry formed in said semiconductor substrate; and,an integral decoupling capacitor formed in said semiconductor substrate and disposed in close proximity to a positive and a negative power supply connection of said decoupled circuitry, said integral decoupling capacitor including;a first p-type doped diffusion region electrically connected to said positive power supply connection of said decoupled circuitry;a second p-type doped diffusion region electrically connected to said positive power supply connection of said decoupled circuitry;a channel region disposed between said first and second p-type doped diffusion regions;a gate overlying said channel region and electrically connected to said negative power supply connection of said decoupled circuitry; and,a gate insulator separating said gate and said channel region.