초록 ▼

High quality factor (Q) spiral and toroidal inductor and transformer are disclosed that are compatible with silicon very large scale integration (VLSI) processing, consume a small IC area, and operate at high frequencies. The spiral inductor has a spiral metal coil deposited in a trench formed in a

High quality factor (Q) spiral and toroidal inductor and transformer are disclosed that are compatible with silicon very large scale integration (VLSI) processing, consume a small IC area, and operate at high frequencies. The spiral inductor has a spiral metal coil deposited in a trench formed in a dielectric layer over a substrate. The metal coil is enclosed in ferromagnetic liner and cap layers, and is connected to an underpass contact through a metal filled via in the dielectric layer. The spiral inductor also includes ferromagnetic cores lines surrounded by the metal spiral coil. A spiral transformer is formed by vertically stacking two spiral inductors, or placing them side-by-side over a ferromagnetic bridge formed below the metal coils and cores lines. The toroidal inductor includes a toroidal metal coil with a core having ferromagnetic strips. The toroidal metal coil is segmented into two coils each having a pair of ports to form a toroidal transformer.

대표청구항 ▼

[ Having thus described our invention, what we claim as new, and desire to secure by Letters Patent is:] [1.] A method of forming a planar monolithic inductor comprising the steps of:(a) forming a first dielectric layer over a substrate; and(b) forming a toroidal metal coil in said first dielectric

[ Having thus described our invention, what we claim as new, and desire to secure by Letters Patent is:] [1.] A method of forming a planar monolithic inductor comprising the steps of:(a) forming a first dielectric layer over a substrate; and(b) forming a toroidal metal coil in said first dielectric layer, wherein said toroidal metal coil is formed byforming a first trench in said first dielectric layer;depositing a first metal in said first trench; segmenting said first metal to form first metal segments;forming a second dielectric layer over said first metal segments;forming, in said second dielectric layer, vias over ends of said first metal segments, and a plurality of trenches between opposingvias of adjacent first metal segments; anddepositing a second metal in said plurality of trenches and vias.