초록 ▼

A computer bus that enables bus mastering agents to send/receive a burst of data to/from a slave agent without determining in advance the number of data words to be transferred, or even the maximum number of data words that could be transferred. Either the master, the slave, or the bus arbiter can t

A computer bus that enables bus mastering agents to send/receive a burst of data to/from a slave agent without determining in advance the number of data words to be transferred, or even the maximum number of data words that could be transferred. Either the master, the slave, or the bus arbiter can terminate the burst at any time with minimum overhead. Furthermore, either the master or the slave can throttle the speed of the data transfer by adding wait states. Distributed address decode is performed by each agent coupled to the bus. Each agent must claim a transaction directed toward it by the master. If no agent claims the transaction within a predetermined number of clock periods, a subtractive decode device may claim the transaction by default. The bus also includes a bus lock wherein each bus slave agent may be able to enter a locked state, and once in the locked state, reject all accesses except those initiated by the master agent that locked it. Signal line LOCK# is owned by only one master agent at a time. Although the LOCK# signal must be obtained by acquiring the bus while LOCK# is high, ownership of the line is maintained as long as LOCK# is held low. Therefore, a master agent can own the lock while another master uses the bus.

대표청구항 ▼

[ What is claimed is:] [1.] A method for locking a slave device connected to a bus, the method comprising:a master device accepting control of a bus;the master device performing a bus transaction by accessing a slave device connected to the bus;the master device asserting a lock signal line while ac

[ What is claimed is:] [1.] A method for locking a slave device connected to a bus, the method comprising:a master device accepting control of a bus;the master device performing a bus transaction by accessing a slave device connected to the bus;the master device asserting a lock signal line while accessing the slave device;the slave device detecting that it is locked in response to assertion of the lock signal line;the master device relinquishing control of the bus;the master device maintaining assertion of the lock signal line after relinquishing control of the bus such that the slave device remains locked; andthe slave device denying access to another master device while locked.