초록 ▼

A slave DMA peripheral achieves the functionalities of a bus master without incurring the costs of additional address and control lines. Information regarding buffers to be accessed is loaded in the peripheral from the CPU. Actual buffer addresses, length values, and direction information are later

A slave DMA peripheral achieves the functionalities of a bus master without incurring the costs of additional address and control lines. Information regarding buffers to be accessed is loaded in the peripheral from the CPU. Actual buffer addresses, length values, and direction information are later programmed into the DMA controller by the peripheral. The present invention manages communication between the peripheral and main memory through the DMA controller. This allows the peripheral to access buffers in memory using a minimal number of lines.

대표청구항 ▼

[ What is claimed is:] [1.] A method for transferring data between a memory and a peripheral in a computer system, comprising:programming the peripheral with address information and direction information of buffers in the memory;sending a first memory address and a first transfer direction of a firs

[ What is claimed is:] [1.] A method for transferring data between a memory and a peripheral in a computer system, comprising:programming the peripheral with address information and direction information of buffers in the memory;sending a first memory address and a first transfer direction of a first buffer in the memory from the peripheral to a direct memory access (DMA) controller through a data bus during one or more read cycles when the DMA controller asserts a data acknowledge line; andcoordinating data transfer between the first buffer and the peripheral.