초록 ▼

A field effect transistor comprising a semiconductor substrate having a transistor trench extending downward from an upper surface of the semiconductor substrate. The trench extends to a trench depth below an upper surface of the semiconductor substrate. The transistor further includes a gate dielec

A field effect transistor comprising a semiconductor substrate having a transistor trench extending downward from an upper surface of the semiconductor substrate. The trench extends to a trench depth below an upper surface of the semiconductor substrate. The transistor further includes a gate dielectric layer that is formed on a floor of the transistor trench over a channel region of the semiconductor substrate. A conductive gate structure is formed above and in contact with the gate dielectric layer. A source/drain impurity distribution is formed within a source/drain region of the semiconductor substrate. The source/drain region is laterally disposed on either side of the channel region of the semiconductor substrate. In a preferred embodiment, the trench depth is between 1,000-5,000 angstroms and a thickness of the conductive gate structure is less than 5,000 angstroms such that an upper surface of the conductive gate structure is level with or below an upper surface of the semiconductor substrate. The gate dielectric layer suitably comprises a thermal oxide having a thickness of approximately 20-200 angstroms. In a lightly doped drain (LDD) embodiment, the source/drain impurity distribution includes a lightly doped region and a heavily doped region. The lightly doped region extends laterally from the channel region of the transistor to the heavily doped region. In the preferred embodiment, a lateral dimension of the channel region of the transistor is approximately 100-300 nm.

대표청구항 ▼

[ What is claimed is:] [1.] A transistor, comprising:a transistor trench formed within a monocrystalline semiconductor substrate, wherein facing etched surfaces of the monocrystalline substrate comprise sidewalls of the transistor trench;a conductive gate structure dielectrically spaced above a floo

[ What is claimed is:] [1.] A transistor, comprising:a transistor trench formed within a monocrystalline semiconductor substrate, wherein facing etched surfaces of the monocrystalline substrate comprise sidewalls of the transistor trench;a conductive gate structure dielectrically spaced above a floor of the transistor trench; anda pair of dielectric spacer structures formed within the trench, interposed between and laterally adjacent to the conductive gate structure and the sidewalls of the transistor trench, wherein a width of each dielectric spacer structure is greatest at a lower end of the spacer structure adjacent the floor of the transistor trench.