초록 ▼

An electronic delay circuit (10) for use in a detonator (100) has a switching circuit (20) and a timer circuit (22). Switching circuit (20) controls the flow of a stored charge of electrical energy from a storage capacitor (12) to a bridge initiation element such as a semiconductor bridge (18) or a

An electronic delay circuit (10) for use in a detonator (100) has a switching circuit (20) and a timer circuit (22). Switching circuit (20) controls the flow of a stored charge of electrical energy from a storage capacitor (12) to a bridge initiation element such as a semiconductor bridge (18) or a tungsten bridge. The timing of the release of this energy is controlled by timer circuit (22). Switching circuit (20) is an integrated, dielectrically isolated, bipolar CMOS (DI BiCMOS) circuit, whereas timer circuit (22) is a conventional CMOS circuit. The use of a DI BiCMOS switching circuit allows for greater efficiency of energy transfer from the storage capacitor (12) to the semiconductor bridge (18) than has previously been attained.

대표청구항 ▼

[ What is claimed is:] [1.] A delay circuit comprising:an input terminal for receiving a charge of electrical energy;storage means connected to the input terminal for receiving and storing a charge of electrical energy;an integrated, dielectrically isolated BiCMOS switching circuit comprising integr

[ What is claimed is:] [1.] A delay circuit comprising:an input terminal for receiving a charge of electrical energy;storage means connected to the input terminal for receiving and storing a charge of electrical energy;an integrated, dielectrically isolated BiCMOS switching circuit comprising integrated circuit elements being dielectrically isolated from each other and connecting the storage means to an output terminal for releasing energy stored in the storage means to such output terminal in response to a signal from a timer circuit;an output terminal connected to the storage means through the switching circuit; andthe timer circuit being operatively connected to the switching circuit for controlling the release to the output terminal by the switching circuit of energy stored in the storage means, wherein the timer circuit comprises a CMOS integrated circuit.