초록 ▼

A receiver circuit, particularly an integrated, zero IF receiver circuit in which a direct conversion IF stage is separated from an antenna by a further fequency conversion stage which is AC coupled to the direct conversion IF stage. A single crystal oscillator generates a frequency which is multipl

A receiver circuit, particularly an integrated, zero IF receiver circuit in which a direct conversion IF stage is separated from an antenna by a further fequency conversion stage which is AC coupled to the direct conversion IF stage. A single crystal oscillator generates a frequency which is multiplied prior to being applied as a local oscillator signal to the further frequency conversion stage and is used to produce another frequency, which is divided to block harmonics, prior to being applied as quadrature related local oscillator signals to the direct conversion IF stage. The direct coversion IF stage includes several dc nulling for compensating for dc offsets.

대표청구항 ▼

[ We claim:] [1.] A receiver circuit comprising, in combination,(a) a signal input,(b) a superheterodyne stage coupled to the signal input,(c) a direct conversion stage having quadrature related signal paths,(d) ac coupling means coupling an output of the superheterodyne stage to an input of the dir

[ We claim:] [1.] A receiver circuit comprising, in combination,(a) a signal input,(b) a superheterodyne stage coupled to the signal input,(c) a direct conversion stage having quadrature related signal paths,(d) ac coupling means coupling an output of the superheterodyne stage to an input of the direct conversion stage,(e) demodulating means coupled to the direct conversion stage,(f) local oscillator signal generating means comprising a single oscillator having an output frequency different from the local oscillator frequencies required by each of the superheterodyne stage and the direct conversion stage,(g) means for producing the local oscillator frequency for the superheterodyne stage from said output frequency,(h) means, including a frequency divider, for producing quadrature related local oscillator signals for the direct conversion stage from said output frequency, and(i) at least one dc nulling stage in each of the quadrature related signal paths of the direct conversion stage, the at least one dc nulling stage including means for measuring the dc offset in the signal path to which it is connected and for applying a substantially equal and opposite dc correction to the signal path.