초록 ▼

A digital signal processor is provided which is compatible with a large variety of modulation processes (e.g., BPSK, QPSK,.pi./4 QPSK, M-ary FSK and M-ary PSK). The processor has a transmit section which can convert input data streams into baseband I and Q signals and a receive section which can rec

A digital signal processor is provided which is compatible with a large variety of modulation processes (e.g., BPSK, QPSK,.pi./4 QPSK, M-ary FSK and M-ary PSK). The processor has a transmit section which can convert input data streams into baseband I and Q signals and a receive section which can recover data streams from input baseband I and Q signals. The transmit section includes a direct I/Q modulator and a common phase modulator and the receive section includes an M-FSK to M-PSK converter and a common phase demodulator. The processor is particularly suited for realization as an application-specific integrated circuit (ASIC) which can be integrated in multiband, multimode transceivers.

대표청구항 ▼

[ We claim:] [1.] A method of processing an input data stream d(t) into output baseband in-phase and quadrature signals I(t) and Q(t) which facilitate the generation of a plurality of different in-phase and quadrature modulated signals and of processing a plurality of different demodulated input bas

[ We claim:] [1.] A method of processing an input data stream d(t) into output baseband in-phase and quadrature signals I(t) and Q(t) which facilitate the generation of a plurality of different in-phase and quadrature modulated signals and of processing a plurality of different demodulated input baseband in-phase and quadrature signals I(t) and Q(t) into an output data stream d(t), said input and output data streams d(t) being formed of data bits having a bit duration, said method comprising the steps of:receiving a modulation selection signal which indicates a selected one of the following modulation processes;a) binary phase shift keying,b) differential phase shift keying,c) quadrature phase shift keying,d) differential quadrature phase shift keying,d) offset quadrature phase shift keying,e) .pi./4 quadrature phase shift keying,f) shaped quadrature phase shift keying, andg) M-ary phase shift keying;receiving said input data stream d(t);in response to said selection signal, converting said input data stream d (t) into said output baseband in-phase and quadrature signals I(t) and Q(t) which will modulate in-phase and quadrature sinusoidal signals in accordance with said selected modulation process;receiving said input baseband in-phase and quadrature signals I(t) and Q(t) which have been generated by demodulation in accordance with said selected modulation process; andin response to said selection signal, recovering said output data stream d(t) from said input baseband in-phase and quadrature signals I(t) and Q(t).