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Semiconductor package with molded plastic body 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • H01L-023/02
  • H01L-023/28
  • H01L-023/36
  • H01L-023/48
출원번호 US-0249104 (1994-05-25)
발명자 / 주소
  • Parthasarathi Arvind
  • Mahulikar Deepak
출원인 / 주소
  • Advanced Technology Interconnect Incorporated
대리인 / 주소
    Rosenblatt
인용정보 피인용 횟수 : 13  인용 특허 : 22

초록

There is provided a leadframe assembly for encapsulation in a polymer resin which prevents post-assembly fracture or swelling of the resin. The leadframe is coated with an adhesion enhancing layer that increases the shear stress required for delamination to in excess of about 3.4 MPa. In combination

대표청구항

[ We claim:] [1.] A leadframe assembly, comprising:a metallic leadframe having a plurality of leads, each said lead having an inner lead portion and an outer lead portion, said inner lead portions defining a central aperture;a metallic heat spreader disposed within said central aperture;an adhesion

이 특허에 인용된 특허 (22)

  1. Butt Sheldon H. (Godfrey IL) Smith ; III Edward F. (Madison CT) Gyurina F. Dennis (West Haven CT), Adhesion primers for encapsulating epoxies.
  2. Lin Lifun (Waltham MA) Chao Chung-Yao (Waltham MA), Chromium-zinc anti-tarnish coating on copper foil.
  3. Butt Sheldon H. (Godfrey IL), Clad metal lead frame substrates.
  4. Yamazaki Shunpei (Tokyo JPX) Urata Kazuo (Atsugi JPX) Koyama Itaru (Hadano JPX), Electric device having a leadframe covered with an antioxidation film.
  5. Doering Anton (Pliezhausen DEX) Olbrich Ludger (Reutlingen DEX), Electronic circuit component with heat sink mounted on a lead frame.
  6. Nakamura Tsutomu (Hyogo JPX) Iguchi Takahisa (Hyogo JPX) Nakai Tetsuo (Hyogo JPX), Heat radiating component and semiconductor device provided with the same.
  7. Kobayashi Shiro (Hitachi JPX) Kazama Narutoshi (Hitachi JPX) Itoh Masahiko (Hitachioota JPX) Ohnaka Noriyuki (Katsuta JPX), Lead frame for semiconductor device.
  8. Mahulikar Deepak (Madison CT) Fister Julius C. (Hamden CT) Violette Gerald N. (Hamden CT), Lead frame having polymer coated surface portions.
  9. Parthasarathi Arvind (North Branford CT) Mahulikar Deepak (Madison CT), Lead frames having a chromium and zinc alloy coating.
  10. Butt Sheldon H. (Godfrey IL) Mahulikar Deepak (Meriden CT), Metal packages having improved thermal dissipation.
  11. Braden Jeffrey S. (Milpitas CA), Multi-layer lead frames for integrated circuit packages.
  12. Ito Mamoru (Gunma) Enomoto Usuke (Isezaki) Sakamoto Tomoo (Takasaki JPX), Packaged semiconductor device and electronic device module including same.
  13. Nishimori Syuuji (Osaka JPX) Harada Tadaaki (Osaka JPX) Yamamoto Yasuhiko (Osaka JPX) Hiromori Nobuyuki (Osaka JPX) Yoshimura Yasumori (Osaka JPX) Muramatsu Katsuya (Osaka JPX) Shimada Katsumi (Osaka, Photosemiconductor device and epoxy resin composition for use in molding photosemiconductor.
  14. Chang Kin-Shiung (Meriden CT) Armer Thomas A. (New Haven CT) Bridges William G. (San Jose CA), Process for manufacturing plastic pin grid arrays and the product produced thereby.
  15. Mori Ryuichiro (Itami JPX) Akiyama Tatsuhiko (Itami JPX) Fukudome Katsuyuki (Itami JPX), Resin-encapsulated semiconductor device.
  16. Okinaga Takayuki (Akishima JPX) Tachi Hiroshi (Ohme JPX) Ozaki Hiroshi (Kokubunji JPX) Otsuka Kanji (Higashiyamato JPX) Furukawa Michiaki (Fucyu JPX) Yamasaki Yasuyuki (Kodaira JPX), Semiconductor device.
  17. Sakai Kunito (Hyogo JPX) Matsuda Sadamu (Hyogo JPX) Takahama Takashi (Hyogo JPX), Semiconductor device and manufacturing method therefor.
  18. Suzuki Akira (Ohme JPX) Tanaka Hideki (Koganei JPX) Murakami Gen (Machida JPX), Semiconductor device and method of manufacturing thereof.
  19. Inayoshi Hideo (Kokubunji JPX) Suzuki Akira (Ome JPX) Tsubosaki Kunihiro (Hino JPX) Ueda Toyoichi (Katsuta JPX) Makino Daisuke (Hitachi JPX) Ichimura Nobuo (Hitachi JPX) Suzuki Kazunari (Tokyo JPX), Semiconductor device and process for producing the same.
  20. Crane Jacob (Woodbridge CT) Johnson Barry C. (Tucson AZ) Mahulikar Deepak (Meriden CT) Butt Sheldon H. (Godfrey IL), Semiconductor package.
  21. Butt Sheldon H. (Godfrey IL) Fister Julius C. (Hamden CT) Crane Jacob (Woodbridge CT), Special surfaces for wire bonding.
  22. Dentini Mark S. (Holland PA) Fulton Joe A. (Ewing NJ) Jin Sungho (Millington NJ) Mottine ; Jr. John J. (West Keansburg NJ) Shepherd Lloyd (Madison NJ) Sherwood Richard C. (New Providence NJ), Thermal conductor assembly.

이 특허를 인용한 특허 (13)

  1. Lars-Anders Olofsson SE, Capsule for at least one high power transistor chip for high frequencies.
  2. Manfred Loddenkotter DE; Thilo Stolze DE, Connecting device for power semiconductor modules with compensation for mechanical stresses.
  3. Wu, Meng-Chai; Yang, He-Shun, LED lighting device.
  4. Park Hee Jin,KRX ; Cho Dong Whan,KRX ; Kim Soo Heon,KRX ; Park Jung Gun,KRX, Lead frame with heat spreader and semiconductor package therewith.
  5. Leung, Timothy; Ramos, Mary Jean Bajacan; Yeow, Gan Kian; Lwin, Kyaw Ko; San Antonio, Romarico Santos; Subagio, Anang, Method of making thermally enhanced substrate-base package.
  6. Atzesdorfer, Alexandra; Müller, Rainer; Heckmann, Klaus; Bauer, Friederike, Methods of using adhesion enhancing layers and microelectronic integrated modules including adhesion enhancing layers.
  7. Roy V. Buck, Jr., Microelectronic-device assemblies and methods that exclude extraneous elements from sensitive areas.
  8. Kodani,Kazuya; Shingai,Nobuhiro, Power semiconductor module.
  9. Abbott, Donald C., Pre-finished leadframe for semiconductor devices and method of fabrication.
  10. Hayashi, Kenichi; Kawafuji, Hisashi; Tajiri, Mitsugu; Shikano, Taketoshi, Resin-molded device and manufacturing apparatus thereof.
  11. Nishikawa,Masataka, Semiconductor module and production method therefor and module for IC cards and the like.
  12. Shivkumar, Bharat; Cheah, Chuan, Semiconductor multichip module package with improved thermal performance; reduced size and improved moisture resistance.
  13. Uchida, Kenji; Hirasawa, Koki; Shimada, Katsumi; Uenishi, Shinjiro; Ota, Shinya, Transparent epoxy resin composition for molding optical semiconductor and optical semiconductor integrated circuit device using the same.
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