초록 ▼

An FSK signal receiver includes an amplifier which amplifies a first FSK signal at an adjustable gain. A frequency converter converts an output signal from the amplifier into a second FSK signal having a frequency lower than a frequency of the first FSK signal. A demodulator demodulates the second F

An FSK signal receiver includes an amplifier which amplifies a first FSK signal at an adjustable gain. A frequency converter converts an output signal from the amplifier into a second FSK signal having a frequency lower than a frequency of the first FSK signal. A demodulator demodulates the second FSK signal into a baseband signal. A bit-state detector detects a bit state from the baseband signal in response to a threshold. A calculator calculates a number of times of occurrence of a fact that the baseband signal moves across the threshold during a given time. The gain of the amplifier is adjusted in response to the number of times which is calculated by the calculator.

대표청구항 ▼

[ What is claimed is:] [1.] An FSK signal receiver comprising:a demodulator demodulating a multi-value FSK signal into a voltage signal in response to transmission rate information, the voltage signal having a voltage depending on an instantaneous frequency of the multi-value FSK signal;an A/D conve

[ What is claimed is:] [1.] An FSK signal receiver comprising:a demodulator demodulating a multi-value FSK signal into a voltage signal in response to transmission rate information, the voltage signal having a voltage depending on an instantaneous frequency of the multi-value FSK signal;an A/D converter converting the voltage signal into a corresponding digital signal, and outputting the digital signal;a bit sync device generating a bit sync signal from the output signal of the A/D converter;a bit-state detector including said bit sync device therein;said bit-state detector detecting a bit state from the output signal of the A/D converter in response to a threshold value at a timing responsive to the bit sync signal, and outputting recovered data corresponding to the detected bit state;an error correction device correcting errors in the recovered data;a histogram calculator providing histograms of digital values of the output signal of the A/D converter which occurs at every moment of the bit-state detection by the bit-state detector for respective different symbol states in response to output data from the error correction device;means for extracting the transmission rate information from the output data of the error correction device, and feeding the transmission rate information to the demodulator; andmeans for adjusting the threshold voltage used in the bit-state detector in response to the histograms provided by the histogram calculator and also the transmission rate information extracted by the extracting means.