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Task processing optimization in a multiprocessor system 원문보기

IPC분류정보
국가/구분 United States(US) Patent 등록
국제특허분류(IPC7판)
  • G06F-015/16
출원번호 US-0867095 (1997-06-02)
발명자 / 주소
  • Broder Andrei
  • Mitzenmacher Michael
출원인 / 주소
  • Digital Equipment Corporation
대리인 / 주소
    Pennie & Edmonds LLP
인용정보 피인용 횟수 : 96  인용 특허 : 10

초록

A method of operating a multiprocessor system having a predefined number of processing units for processing data, includes obtaining load information representing a loading of each of a number of randomly selected ones of the processing units. The number of randomly selected processing units is grea

대표청구항

[ We claim:] [1.] A method of selecting one of a number of resources for servicing an item, comprising the steps of:randomly selecting a subset of the resources, the subset having an associated number of resources that is greater than 1 and substantially less than the number of resources;querying ea

이 특허에 인용된 특허 (10)

  1. Sharony Jacob (Port Washington NY), Architecture for mobile radio networks with dynamically changing topology using virtual subnets.
  2. Akizawa Mitsuru (Hachioji JPX) Yamashita Hirofumi (Yokohama JPX) Kawaguchi Hisamitsu (Sagamihara JPX) Tada Katsumi (Yokohama JPX) Kato Kanji (Yokohama JPX) Kito Akira (Ebina JPX) Yamada Hidenori (Had, File server system and file access control method of the same.
  3. Boll Alfred R. (St. Croix MN) Finke David G. (St. Paul MN) Koehn Charles S. (St. Paul MN), Interprocess communications interface for managing transaction requests.
  4. Martineau Pierre G.,CAX ; Spackman Stephen P.,CAX, Method and apparatus for establishing the legitimacy of use of a block of digitally represented information.
  5. Witte Martin (Ulm DEX) Oehlerich Joerg (Stockdorf DEX) Held Walter (Geretsried DEX), Method for load balancing in a multi-processor system where arising jobs are processed by a plurality of processors unde.
  6. Heizer Isaac J. (Little Silver NJ), Method of and apparatus for operating a client/server computer network.
  7. Pattin Jay C. ; Blomgren James S., Multi-processor DRAM controller that prioritizes row-miss requests to stale banks.
  8. Naganuma Jiro (Zama JPX) Ogura Takeshi (Chigasaki JPX), Multiprocessor system and a method of load balancing thereof.
  9. Cubero-Castan Michel (Toulouse FRX) Durrieu Guy (Saint Orens FRX) Lecussan Bernard (Balma FRX) Lemaitre Michel (Toulouse FRX), Switching device for balancing load in communication network based on source and destination load information and intern.
  10. Celis Pedro ; Vaishnav Jay ; Zeller Hansjorg, System and method for database query optimization.

이 특허를 인용한 특허 (96)

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