초록 ▼

A reduced cost and hardware complexity ISDN channel bank architecture supports a plurality of Basic Rate-One Transmission Extension (BRITE) ISDN circuit cards. Rather than install a dedicated processor on each BRITE card or multiple BRITE circuits on one card, each BRITE circuit card of the channel

A reduced cost and hardware complexity ISDN channel bank architecture supports a plurality of Basic Rate-One Transmission Extension (BRITE) ISDN circuit cards. Rather than install a dedicated processor on each BRITE card or multiple BRITE circuits on one card, each BRITE circuit card of the channel bank has no processor of its own, but is instead controlled by a shared control processor on a separate bank controller card. Since each such `processorless` BRITE circuit card contains only single BRITE circuit, removal of any one BRITE circuit card from its backplane slot will not impair the operational integrity of the other BRITE cards, so that service to customer premises equipment terminating the local loops to such cards is not interrupted. The shared processor on the bank controller card executes the same single task communication control routine for plural BRITE cards.

대표청구항 ▼

[ What is claimed:] [1.] A digital communication system channel bank comprising:a digital transceiver unit coupled to a first digital communication link, said digital transceiver unit interfacing digital communication signals between said first digital communication link and a backplane of said chan

[ What is claimed:] [1.] A digital communication system channel bank comprising:a digital transceiver unit coupled to a first digital communication link, said digital transceiver unit interfacing digital communication signals between said first digital communication link and a backplane of said channel bank;a plurality of digital communication circuit cards installed in card slots of said backplane of said channel bank, each respective digital communication circuit card having no communications control processor of its own and being coupled to an associated digital communication circuit servicing a respective subscriber; anda channel bank controller card installed in said backplane, separate from said plurality of digital communication circuit cards, said channel bank controller card containing a control processor, which is operative to execute communication control software having exclusive control of the operation of each of said plurality of digital communication circuit cards, and wherein said control processor of said channel bank controller card is configured to map the identification of an input/output port thereof into a respective portion of address space of memory employed by said control processor, said respective portion of address space storing information associated with the operation of said digital communication circuit card, and including a card slot decoder which is operative to identify a respective card slot containing said digital communication circuit card in accordance with the identification of said input/output port.