초록 ▼

Power consumption in medical devices is reduced through the use and operation of multiple digital signal processing systems. Each processor of the multiple systems performs at least one particular function in a predetermined time period. The multiple digital signal processors of such systems can be

Power consumption in medical devices is reduced through the use and operation of multiple digital signal processing systems. Each processor of the multiple systems performs at least one particular function in a predetermined time period. The multiple digital signal processors of such systems can be operated at lower clock frequencies relative to those that would be required by one of such processors to complete the multiple functions within the predetermined time period. With reduced clock frequency, power consumption is reduced. Further, with reduced clock speed, supply voltages applied to such digital signal processors may also be reduced.

대표청구항 ▼

[ I claim:] [1.] A medical device, comprising:a first digital signal processing system for receiving data of at least a first analog input, the first digital signal processing system including a first digital signal processor operating on the data representative of the at least first analog input to

[ I claim:] [1.] A medical device, comprising:a first digital signal processing system for receiving data of at least a first analog input, the first digital signal processing system including a first digital signal processor operating on the data representative of the at least first analog input to perform at least a first function during a predetermined time period;a second digital signal processing system for receiving data of at least a second analog input, the second digital signal processing system including a second digital signal processor operating on the data representative of the at least second analog input to perform at least a second function during the predetermined time period; anda supply voltage source operatively connected to provide a first supply voltage to the first digital signal processor and a second supply voltage to the second digital signal processor, wherein the first and second supply voltages are such that the power consumed by the first and second digital signal processors in performance of the first and second functions in the predetermined time period is less than the power that would be consumed if only one of the first and second digital signal processors were to perform both of the first and second functions within the predetermined time period.