초록 ▼

A method of fabricating a capacitor in a DRAM. A semiconductor substrate having a metal-oxide-semiconductor is provided. Using only one photolithography process, a bottom electrode is formed. By forming a dielectric layer over the substrate, and a poly-silicon layer on the dielectric layer, a capaci

A method of fabricating a capacitor in a DRAM. A semiconductor substrate having a metal-oxide-semiconductor is provided. Using only one photolithography process, a bottom electrode is formed. By forming a dielectric layer over the substrate, and a poly-silicon layer on the dielectric layer, a capacitor is formed.

대표청구항 ▼

[ What is claimed is:] [1.] A method of fabricating a capacitor, wherein a semiconductor substrate having a metal-oxide-semiconductor is provided, comprising:forming a first oxide layer, a silicon nitride layer, a second oxide layer, and a first poly-silicon layer on the substrate in sequence;patter

[ What is claimed is:] [1.] A method of fabricating a capacitor, wherein a semiconductor substrate having a metal-oxide-semiconductor is provided, comprising:forming a first oxide layer, a silicon nitride layer, a second oxide layer, and a first poly-silicon layer on the substrate in sequence;patterning the first poly-silicon layer and the second oxide layer to form a first opening, so that the silicon nitride layer within the first opening is exposed;forming a third oxide layer over the substrate;etching the third oxide layer with the silicon nitride layer as an etch stop;etching the silicon nitride layer to form a second opening the first oxide layer is exposed, using the remaining third oxide layer and the first poly-silicon layer as masks;deepening the second opening by etching the first oxide layer until the substrate is exposed;forming a second poly-silicon layer to cover the first poly-silicon layer and the first opening, and to fill the second opening;forming a fourth oxide layer on the second poly-silicon layer;removing the fourth oxide layer, the second poly-silicon layer, and the first poly-silicon layer until the second oxide layer is exposed;wet etching the remaining fourth oxide layer and the second oxide layer with the silicon nitride layer as an etch stop;forming an insulation layer over the silicon substrate; andforming a third poly-silicon layer on the insulation layer.