초록 ▼

A resistor protect mask is used on a shallow trench isolation device junction to cover a device area except for a strip on the perimeter of the device area. The silicide layer formed on the central surface portion of the device and the strip area on the perimeter of the device upon which silicide fo

A resistor protect mask is used on a shallow trench isolation device junction to cover a device area except for a strip on the perimeter of the device area. The silicide layer formed on the central surface portion of the device and the strip area on the perimeter of the device upon which silicide formation is prevented forms a test structure for evaluation of junction formation that is immune from the effects of silicide formation on a device trench sidewall. Electrical tests and leakage measurements upon the test structure are compared directly to similar silicide shallow trench isolated devices which do not incorporate the resistor protect mask and shallow trench isolated devices without silicide to determine whether salicide processing is a cause of junction effects including junction leakage and short-circuiting.

대표청구항 ▼

[ What is claimed is:] [1.] A semiconductor device comprising:a test structure for evaluating junction leakage including:a first active device formed in a semiconductor substrate and having an upper surface;a shallow trench etched laterally surrounding the first active device;an isolating oxide laye

[ What is claimed is:] [1.] A semiconductor device comprising:a test structure for evaluating junction leakage including:a first active device formed in a semiconductor substrate and having an upper surface;a shallow trench etched laterally surrounding the first active device;an isolating oxide layer formed in the shallow trench lateral to the first active device; anda first silicide layer formed on the upper surface of the first active device, the first silicide layer being patterned so that a peripheral edge of the first active device completely surrounding the first silicide layer is left uncovered by the first silicide layer; anda second active device formed in the semiconductor substrate and having an upper surface, the shallow trench being etched laterally surrounding the second active device, the isolating oxide layer being formed in the shallow trench lateral to the second active device, the second active device having a silicide layering that differs from the first silicide layer of the first active device for comparative electrical testing.