초록 ▼

A semiconductor component (10) includes a substrate (11), doped regions (15, 20) in the substrate (11), interconnect layers (23, 26, 29) coupled to one of the doped layers, and dielectric layers (21, 24, 27) between the interconnect layers (23, 26, 29) wherein a portion (48) of the top interconnect

A semiconductor component (10) includes a substrate (11), doped regions (15, 20) in the substrate (11), interconnect layers (23, 26, 29) coupled to one of the doped layers, and dielectric layers (21, 24, 27) between the interconnect layers (23, 26, 29) wherein a portion (48) of the top interconnect layer (29) overlies portions (47, 42, 43) of the underlying interconnect layers (23, 26) and wherein a portion (47) of the middle interconnect layer (26) does not overlie the portions (42, 43) of the bottom interconnect layer (23) and also does not overlie portions (32, 33) of one of the doped regions (20).

대표청구항 ▼

[ We claim:] [1.] A semiconductor component comprising:a substrate;a first doped region in the substrate;an electrostatic-discharge protection device in the substrate comprising a second doped region in the substrate wherein a first portion of the second doped region contacts the first doped region

[ We claim:] [1.] A semiconductor component comprising:a substrate;a first doped region in the substrate;an electrostatic-discharge protection device in the substrate comprising a second doped region in the substrate wherein a first portion of the second doped region contacts the first doped region at a first portion of the substrate;a first interconnect layer overlying the electrostatic-discharge protection device, wherein a ring-shaped portion of the first interconnect layer overlies and contacts a second portion of the second doped region;a second interconnect layer overlying the first interconnect layer and the electrostatic-discharge protection device, wherein a portion of the second interconnect layer overlies and contacts the first interconnect layer, overlies the electrostatic-discharge protection device, is devoid of overlying the ring-shaped portion of the first interconnect layer, and is devoid of overlying the first and second portions of the second doped region; anda third interconnect layer overlying the first and second interconnect layers and the electrostatic-discharge protection device, wherein a portion of the third interconnect layer overlies and contacts the second interconnect layer, overlies the electrostatic-discharge protection device, and overlies the portions of the first and second interconnect layers.