이 특허에 인용된 특허 (83) 인용/피인용 타임라인 분석

1. Thomas ; III John H. (Holland PA) Singh Bawa (Voorhees NJ), Apparatus and method for determining power in plasma processing.

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2. Pankove ; Jacques I., Apparatus and method for maskless ion implantation.

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3. Ovshinsky Stanford R. (Bloomfield Hills MI) Ovshinsky Herbert (Oak Park MI) Young Rosa (Troy MI), Apparatus for deposition of thin-film, solid state batteries.

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4. Fournier Eugene (Garden City MI), Apparatus for microwave glow discharge deposition.

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5. Wallis ; George, Application of field-assisted bonding to the mass production of silicon type pressure transducers.

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6. Sopori Bhushan L. (Denver CO), Back-side hydrogenation technique for defect passivation in silicon solar cells.

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7. Auton John P. (Huntingdon GB2), Blade shields.

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8. Parrillo Louis C. (Austin TX) Cosentino Stephen J. (Mesa AZ) Bergami Bridgette A. (Mesa AZ), CMOS process.

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9. Gorinas Guy (Annecy FR), Device for the rapid depositing of oxides in thin layers which adhere well to plastic supports.

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10. Moslehi Mehrdad M. (Dallas TX) Huang Steve S. (Dallas TX), Distributed ECR remote plasma processing and apparatus.

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11. Dandl Raphael A. (San Marcos CA), Electron cyclotron resonance plasma source.

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12. Dandl Raphael A. (San Marcos CA), Electron cyclotron resonance plasma source and method of operation.

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13. Bonser Douglas J. (Austin TX), Endpoint detection utilizing ultraviolet mass spectrometry.

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14. Phillips Richard J. (Billerica MA) Glicksman Leon R. (Lynnfield MA) Larson Ralph (Bolton MA), Forced-convection, liquid-cooled, microchannel heat sinks.

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15. White Gerald W. (5835 Elm Lawn St. Dallas TX 75228), Gasless ion plating.

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16. White Gerald W. (Dallas TX) Volkers Jack C. (Elgin IL), Gasless ion plating process and apparatus.

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17. Pease Roger F. (Stanford CA) Tuckerman David B. (Stanford CA) Swanson Richard M. (Los Altos CA), Heat sink and method of attaching heat sink to a semiconductor integrated circuit and the like.

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18. Ellenberger Charles E. (Elko NV) Bower George L. (Elko NV) Snow William R. (Sunnyvale CA), Independently variably controlled pulsed R.F. plasma chemical vapor processing.

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19. Benzing Jeffrey C. (Saratoga CA) Broadbent Eliot K. (San Jose CA) Rough J. Kirkwood H. (San Jose CA), Induction plasma source.

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20. King ; William J., Ion beam implantation-sputtering.

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21. Kanai Norio (Chofu JPX), Ion implanter.

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22. Gmitter Thomas J. (Lakewood NJ) Yablonovitch Eli (Middletown Township ; Monmouth County NJ), Lift-off and subsequent bonding of epitaxial films.

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23. Cann Gordon L. (P.O. Box 279 Laguna Beach CA 92652), Magnetoplasmadynamic apparatus and process for the separation and deposition of materials.

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24. Rouse George V. (Indialantic FL) Reinecke Paul S. (Indialantic FL) McLachlan Craig J. (Melbourne Beach FL), Manufacturing ultra-thin wafer using a handle wafer.

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25. Conrad John R. (Madison WI), Method and apparatus for plasma source ion implantation.

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26. Ogle John S. (Milpitas CA), Method and apparatus for producing magnetically-coupled planar plasma.

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27. Pankove Jacques I. (Boulder CO), Method and apparatus for semiconductor circuit chip cooling.

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28. Wittmaack Klaus (Munich DEX), Method and apparatus for the quantitative, depth differential analysis of solid samples with the use of two ion beams.

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29. Berg ; Joseph E. ; Brown ; Jr. ; Randolph E., Method for depositing film on a substrate.

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30. Sarma Kalluri R. (Mesa AZ), Method for fabricating high mobility thin film transistors as integrated drivers for active matrix display.

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31. Aronowitz Sheldon (San Jose CA) Hart Courtney L. (Los Gatos CA), Method for forming isolated semiconductor structures.

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32. Li Chou H. (379 Elm Dr. Roslyn NY 11576), Method for making solid state device utilizing ion implantation techniques.

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33. Kamijo Hiroyuki (Yokohama JPX) Mikata Yuuichi (Kawasaki JPX), Method for manufacturing a semiconductor device and suppressing the generation of bulk microdefects near the substrate s.

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34. Inaba Takashi (Tokyo JPX), Method for manufacturing semiconductor device having a multilayer wiring structure.

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35. Bruel Michel (Veurey FRX), Method for placing semiconductive plates on a support.

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36. Hubler Graham K. (Alexandria VA) Donovan Edward P. (Annandale VA) Van Vechten Deborah (Baltimore MD), Method for producing substoichiometric silicon nitride of preselected proportions.

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37. Mizuno Bunji (Ikoma JPX) Kubota Masafumi (Osaka JPX), Method for removing impurities existing in semiconductor substrate.

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38. White Gerald W. (Dallas TX), Method for resisting galling.

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39. Kaufmann Helmut (Triesen LIX), Method of depositing hard wear-resistant coatings on substrates.

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40. Brown Dale M. (Schenectady NY), Method of making integrated circuits.

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41. Brown Dale M. (Schenectady NY) Vosburgh Kirby G. (Schenectady NY), Method of making integrated circuits utilizing ion implantation and selective epitaxial growth.

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42. Li Jianming (Beijing CNX), Method of making silicon material with enhanced surface mobility by hydrogen ion implantation.

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43. Dandl Raphael A. (San Marcos CA), Method of operation of electron cyclotron resonance plasma source.

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44. Beyer Klaus D. (Poughkeepsie NY) Hsu Louis L. (Fishkill NY) Silvestri Victor J. (Hopewell Junction NY) Yapsir Andrie S. (Pleasane Valley NY), Method of producing a thin silicon-on-insulator layer.

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45. Chen Ching-Hwa (Milpitas CA) Liu David (San Jose CA) Tran Duc (Saratoga CA), Method of treating an article with a plasma apparatus in which a uniform electric field is induced by a dielectric windo.

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46. Zaromb ; Solomon, Methods and apparatus for producing unsupported monocrystalline films of silicon and of other materials.

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47. Houchin Ryuzoh (Osaka) Suzuki Naoki (Osaka JPX), Microwave plasma processor.

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48. Suzuki Yasuhiro (Fuchu JPX) Mori Sumio (Fuchu JPX) Fujiyama Eiji (Fuchu JPX) Sasaki Masami (Fuchu JPX), Microwave plasma treatment apparatus.

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49. Moslehi Mehrdad M. (Dallas TX), Multi-zone plasma processing method and apparatus.

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50. Rough J. Kirkwood H. (264 S. 14th St. San Jose CA 95112) Rose Peter W. (1000 Almanor Ave. Menlo Park CA 94025), Multiple electrode plasma reactor power distribution system.

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51. Jackson Thomas M. (Bishops Stortford GB2) Heinecke Rudolf A. H. (Harlow GB2) Ojha Sureshchandra M. (Harlow GB2), Optical fibre manufacture.

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52. Ohkuni Mitsuhiro (Osaka JPX) Kubota Masafumi (Osaka JPX) Nomura Noboru (Kyoto JPX) Nakayama Ichiro (Osaka JPX) Tamaki Tokuhiko (Osaka JPX), Plasma generating apparatus.

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53. Johnson Wayne L. (12019 S. Appaloosa Dr. Phoenix AZ 85044), Plasma generating apparatus employing capacitive shielding and process for using such apparatus.

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54. Popov Oleg A. (Franklin MA), Plasma generation in electron cyclotron resonance.

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55. Sheng Terry T. (San Jose CA), Plasma immersion ion implantation (PI³) apparatus.

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56. Weiss Armin K. (Rochester NY) Clarke John R. (Rochester NY), Plasma plating.

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57. Imahashi Issei (Yamanashi JPX) Ishii Nobuo (Yamanashi JPX), Plasma processing apparatus.

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58. Minato Mitsuaki (Kanagawa JPX) Matsushita Atsushi (Kanagawa JPX) Omori Shinichi (Kanagawa JPX) Kanamori Jun (Tokyo JPX), Plasma processing apparatus.

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59. Horiike Yasuhiro (Hiroshima JPX) Fukasawa Takayuki (Yamanashi JPX), Plasma treatment apparatus.

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60. Barna Gabriel G. (Richardson TX) Ratliff Charles (Richardson TX), Process and apparatus for detecting aberrations in production process operations.

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61. Dolins Steven B. (Dallas TX) Srivastava Aditya (Richardson TX) Flinchbaugh Bruce E. (Dallas TX) Gunturi Sarma S. (Richardson TX) Lassiter Thomas W. (Garland TX) Love Robert L. (McKinney TX), Process and apparatus for detecting aberrations in production process operations.

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62. Bruel Michel (Veurey FRX) Soubie Alain (St. Egreve FRX) Spinelli Philippe (La Tronche FRX), Process and apparatus for implanting particles in a solid.

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63. Bruel, Michel, Process and apparatus for obtaining beams of particles with a spatially modulated density.

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64. Otto Jrgen (Mainz DEX), Process and apparatus for plasma CVD coating or plasma treating substrates.

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65. Bruel Michel (Veurey FRX) Spinelli Philippe (La Tronche FRX), Process for doping semiconductors.

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66. Bruel Michel (Veurey-Voroize FRX) Floccari Michel (Grenoble FRX), Process for doping semiconductors.

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67. Bruel Michel (Veurey FRX) du Port de Poncharra Jean (St. Martin-Le-Vinoux FRX), Process for producing an insulating layer buried in a semiconductor substrate by ion implantation.

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68. Bruel Michel (Veurey FRX), Process for the production of a relief structure on a semiconductor material support.

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69. Bruel Michel (Veurey FRX), Process for the production of thin semiconductor material films.

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70. Speri Roger (Conflans Sainte Honorine FRX), Process for thermochemical treatments of metals by ionic bombardment.

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71. Boulos Maher (Sherbrooke CAX) Jurewicz Jerzy (Sherbrooke CAX), Process of depositing particulate material on a substrate.

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72. Leung Ka-Ngo (Hercules CA), Pulsed source ion implantation apparatus and method.

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73. Kenney Donald M., SOI fabrication method.

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74. Imura Makoto (Tokyo-to JPX) Kusakabe Kenji (Hyogo-ken JPX), Semiconductor substrate having a gettering layer.

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75. Wittkower Andrew B. (Rockport MA), Simox materials through energy variation.

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76. Drews Klaus (Halstenbek DT) Krumme Jens-Peter (Hamburg DT), Substrate holder for etching thin films.

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77. Komvopoulos Kyriakos (Orinda CA) Brown Ian G. (Berkeley CA) Wei Bo (Albany CA) Anders Simone (Albany CA) Anders Andre (Albany CA) Bhatia Singh C. (Morgan Hill CA), Surface treatment of magnetic recording heads.

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78. Heinecke Rudolf A. H. (Harlow GBX) Ojha Suresh M. (Harlow GBX) Llewellyn Ian P. (Harlow GBX), Surface treatment of plastics material.

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79. Chan Chung (8 Pontiac Rd. Newton MA 02168), System for the plasma treatment of large area substrates.

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80. Jolly Gurvinder (Orleans CAX) Yung Bud K. (Ottawa CAX), Tapering sidewalls of via holes.

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81. Bruel Michel (Veurey FRX) Escaron Jean (Sassenage FRX) Labartino Joseph (Voreppe FRX), Target holder with mechanical scanning.

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82. Altoz Frank E. (Baltimore MD) Porter Richard F. (Millersville MD), Thermal switch.

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83. Ecer Gunes M. (Irvine CA) Wood Susan (Pittsburgh PA) Schreurs Jan J. (Plum Boro PA), Wear resistant steel articles with carbon, oxygen and nitrogen implanted in the surface thereof.

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이 특허를 인용한 특허 (139) 인용/피인용 타임라인 분석

1. Schwarzenbach,Walter; Waechter,Jean Marc, Annealing process and device of semiconductor wafer.

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2. Schwarzenbach,Walter; Waechter,Jean Marc, Annealing process and device of semiconductor wafer.

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3. Adibi, Babak; Murrer, Edward S., Application specific implant system and method for use in solar cell fabrications.

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4. Francois J. Henley ; Michael A. Brayan ; William G. En, Cleaving process to fabricate multilayered substrates using low implantation doses.

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5. Henley,Francois J.; Bryan,Michael A.; En,William G., Cleaving process to fabricate multilayered substrates using low implantation doses.

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6. Henley Francois J. ; Cheung Nathan, Clustertool system software using plasma immersion ion implantation.

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7. Francois J. Henley ; Nathan Cheung, Controlled cleavage process and device for patterned films.

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8. Henley, Francois J.; Cheung, Nathan, Controlled cleavage process and device for patterned films.

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9. Francois J. Henley ; Nathan W. Cheung, Controlled cleavage process and resulting device using beta annealing.

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10. Henley, Francois J.; Cheung, Nathan, Controlled cleavage process using pressurized fluid.

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11. Henley,Francois J.; Cheung,Nathan W., Controlled cleaving process.

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12. Henley,Francois J.; Cheung,Nathan W., Controlled cleaving process.

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13. Henley, Francois J.; Cheung, Nathan W., Controlled process and resulting device.

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14. Henley, Francois J.; Cheung, Nathan W., Controlled process and resulting device.

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15. Henley, Francois J.; Cheung, Nathan W., Controlled process and resulting device.

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16. Henley,Francois J.; Cheung,Nathan W., Controlled process and resulting device.

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17. Blake, Julian G.; Murphy, Paul J., Cooled cleaving implant.

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18. Wells, David H., Covered void within a semiconductor substrate and method of forming a covered void within a semiconductor substrate.

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19. Hiliali, Mohamed M.; Herner, S. Brad, Creation and translation of low-relief texture for a photovoltaic cell.

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20. Li, Zhiyong; Tanner, David; Prabhu, Gopalakrishna; Hilali, Mohamed H., Creation of low-relief texture for a photovoltaic cell.

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21. Aspar, Bernard; Moriceau, Hubert; Zussy, Marc; Rayssac, Olivier, Detachable substrate or detachable structure and method for the production thereof.

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22. Henley Francois J. ; Cheung Nathan W., Economical silicon-on-silicon hybrid wafer assembly.

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23. Maleville, Christophe, Edge removal of silicon-on-insulator transfer wafer.

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24. Wells, David H., Electromagnetic radiation conduits.

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25. Wells, David H., Electromagnetic radiation emitters and conduit structures.

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26. Henley, Francois J.; Cheung, Nathan W., Gettering technique for wafers made using a controlled cleaving process.

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27. Henley, Francois J.; Cheung, Nathan W., Gettering technique for wafers made using a controlled cleaving process.

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28. Couillard, James G.; Gadkaree, Kishor P.; Mach, Joseph F., Glass-based SOI structures.

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29. Couillard, James G.; Gadkaree, Kishor P.; Mach, Joseph F., Glass-based SOI structures.

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30. Couillard,James G.; Gadkaree,Kishor P.; Mach,Joseph F., Glass-based SOI structures.

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31. Couillard,James G.; Gadkaree,Kishor P.; Mach,Joseph F., Glass-based SOI structures.

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32. Couillard,James G.; Gadkaree,Kishor P.; Mach,Joseph F., Glass-based SOI structures.

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33. Couillard,James Gregory; Gadkaree,Kishor Purushottam; Mach,Joseph Frank, Glass-based SOI structures.

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34. Prabhakar, Vinay; Adibi, Babak, Grid for plasma ion implant.

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35. Prabhakar, Vinay; Adibi, Babak, Grid for plasma ion implant.

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36. Joly, Jean-Pierre; Ulmer, Laurent; Parat, Guy, Integrated circuit on high performance chip.

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37. Wells, David H.; Blomiley, Eric R., Integrated circuitry.

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38. Wells, David H., Integrated circuitry and methods of forming a semiconductor-on-insulator substrate.

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39. Tang, Sanh D.; Haller, Gordon, Integrated circuits.

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40. Tang,Sanh D.; Haller,Gordon, Integrated circuits and methods of forming a field effect transistor.

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41. Tang,Sanh D.; Haller,Gordon, Integrated circuits and methods of forming a field effect transistor.

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42. Adibi, Babak; Chun, Moon, Ion implant system having grid assembly.

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43. Adibi, Babak; Chun, Moon, Ion implant system having grid assembly.

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44. Adibi, Babak; Chun, Moon, Ion implant system having grid assembly.

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45. Henley, Francois J., Layer transfer of films utilizing controlled propagation.

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46. Henley, Francois J., Layer transfer of films utilizing controlled shear region.

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47. Faris, Sadeg M., MEMS and method of manufacturing MEMS.

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48. Imaoka, Ko; Kobayashi, Motoki; Uchida, Hidetsugu; Yagi, Kuniaki; Kawahara, Takamitsu; Hatta, Naoki; Minami, Akiyuki; Sakata, Toyokazu; Makino, Tomoatsu; Takagi, Hideki; Kurashima, Yuuichi, Manufacturing method for semiconductor substrate.

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49. Gonzalez, Fernando, Memory cell capacitors having an over/under configuration.

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50. Gonzalez, Fernando, Memory cell capacitors having an over/under configuration.

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51. Gonzalez, Fernando, Memory cell capacitors having an over/under configuration.

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52. Gonzalez,Fernando, Memory cells having an access transistor with a source/drain region coupled to a capacitor through an extension.

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53. Francois J. Henley ; Nathan W. Cheung, Method and device for controlled cleaving process.

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54. Henley, Francois J.; Cheung, Nathan W., Method and device for controlled cleaving process.

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55. Henley,Francois J.; Cheung,Nathan, Method and device for controlled cleaving process.

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56. Henley, Francois J., Method and structure for fabricating multiple tiled regions onto a plate using a controlled cleaving process.

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57. Henley, Francois J., Method and structure for fabricating solar cells using a thick layer transfer process.

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58. Bourdelle, Konstantin; Mazure, Carlos; Rayssac, Olivier; Rayssac, legal representative, Pierre; Rayssac, legal representative, Giséle, Method for direct bonding two semiconductor substrates.

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59. Adibi, Babak; Chun, Moon, Method for ion implant using grid assembly.

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60. Hilali, Mohamed M.; Petti, Christopher J.; Herner, S. Brad, Method for making a photovoltaic cell comprising contact regions doped through a lamina.

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61. Fournel, Franck; Moriceau, Hubert; Lagahe, Christelle, Method for making a stressed structure designed to be dissociated.

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62. Deguet, Chrystel; Clavelier, Laurent, Method for making a thin-film element.

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63. Aspar, Bernard; Lagahe, Christelle; Ghyselen, Bruno, Method for making thin layers containing microcomponents.

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64. Akiyama, Shoji; Kubota, Yoshihiro; Ito, Atsuo; Kawai, Makoto; Tobisaka, Yuuji; Tanaka, Koichi, Method for manufacturing SOI substrate.

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65. Endo,Akihiko; Kusaba,Tatsumi, Method for manufacturing bonded substrate and bonded substrate manufactured by the method.

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66. Kawai, Makoto; Kubota, Yoshihiro; Ito, Atsuo; Tanaka, Koichi; Tobisaka, Yuuji; Akiyama, Shoji, Method for manufacturing pyrolytic boron nitride composite substrate.

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67. Ito, Atsuo; Akiyama, Shoji; Kawai, Makoto; Tanaka, Kouichi; Tobisaka, Yuuji; Kubota, Yoshihiro, Method for manufacturing single crystal silicon solar cell and single crystal silicon solar cell.

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68. Ito, Atsuo; Akiyama, Shoji; Kawai, Makoto; Tanaka, Koichi; Tobisaka, Yuuji; Kubota, Yoshihiro, Method for manufacturing single-crystal silicon solar cell and single-crystal silicon solar cell.

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69. Tauzin, Aurélie; Dechamp, Jérôme; Mazen, Frédéric; Madeira, Florence, Method for preparing thin GaN layers by implantation and recycling of a starting substrate.

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70. Ito, Atsuo; Akiyama, Shoji; Furuya, Masahiro; Kawai, Makoto; Tanaka, Koichi; Kubota, Yoshihiro; Tobisaka, Yuuji, Method for producing single crystal silicon solar cell and single crystal silicon solar cell.

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71. Ito, Atsuo; Akiyama, Shoji; Kawai, Makoto; Tanaka, Koichi; Tobisaka, Yuuji; Kubota, Yoshihiro, Method for producing single crystal silicon solar cell and single crystal silicon solar cell.

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72. Ito, Atsuo; Akiyama, Shoji; Kawai, Makoto; Tanaka, Koichi; Tobisaka, Yuuji; Kubota, Yoshihiro, Method for producing single crystal silicon solar cell and single crystal silicon solar cell.

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73. Ito, Atsuo; Akiyama, Shoji; Kawai, Makoto; Tanaka, Koichi; Tobisaka, Yuuji; Kubota, Yoshihiro, Method for producing single crystal silicon solar cell and single crystal silicon solar cell.

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74. Nguyen, Nguyet-Phuong; Cayrefourcq, Ian; Lagahe-Blanchard, Christelle; Bourdelle, Konstantin; Tauzin, Aurélie; Fournel, Franck, Method for self-supported transfer of a fine layer by pulsation after implantation or co-implantation.

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75. Nguyen, Nguyet-Phuong; Cayrefourcq, Ian; Lagahe-Blanchard, Christelle, Method of catastrophic transfer of a thin film after co-implantation.

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76. Tong,Qin Yi; Fountain, Jr.,Gaius Gillman, Method of detachable direct bonding at low temperatures.

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77. Schwarzenbach,Walter; Maleville,Christophe; Ben Mohamed,Nadia, Method of detaching a layer from a wafer using a localized starting area.

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78. Cayrefourcq,Ian; Mohamed,Nadia Ben; Lagahe Blanchard,Christelle; Nguyen,Nguyet Phuong, Method of detaching a thin film at moderate temperature after co-implantation.

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79. Tauzin, Aurélie; Faure, Bruce; Garnier, Arnaud, Method of detaching a thin film by melting precipitates.

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80. Bourdelle, Konstantin; Mazure, Carlos; Rayssac, legal representative, Pierre; Rayssac, legal representative, Gisèle; Rayssac, Olivier, Method of fabricating a hybrid substrate.

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81. Auberton Herve,Andr？, Method of fabricating substrates and substrates obtained by this method.

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82. Auberton-Herve, Andr?, Method of fabricating substrates and substrates obtained by this method.

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83. Wang, Zhongze, Method of forming silicon-on-insulator comprising integrated circuitry.

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84. Ito, Atsuo; Akiyama, Shoji; Kawai, Makoto; Tanaka, Koichi; Tobisaka, Yuuji; Kubota, Yoshihiro, Method of manufacturing single crystal silicon solar cell and single crystal silicon solar cell.

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85. Takayama, Toru; Maruyama, Junya; Yamazaki, Shunpei, Method of peeling thin film device and method of manufacturing semiconductor device using peeled thin film device.

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86. Takayama, Toru; Maruyama, Junya; Yamazaki, Shunpei, Method of peeling thin film device and method of manufacturing semiconductor device using peeled thin film device.

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87. Aspar, Bernard; Bruel, Michel; Poumeyrol, Thierry, Method of producing a thin layer of semiconductor material.

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88. Aspar, Bernard; Bruel, Michel; Poumeyrol, Thierry, Method of producing a thin layer of semiconductor material.

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89. Aspar,Bernard; Bruel,Michel; Poumeyrol,Thierry, Method of producing a thin layer of semiconductor material.

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90. Aspar,Bernard; Bruel,Michel; Poumeyrol,Thierry, Method of producing a thin layer of semiconductor material.

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91. Nathan W. Cheung ; Xiang Lu ; Chenming Hu, Method of separation films from bulk substrates by plasma immersion ion implantation.

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92. Deguet, Chrystel; Clavelier, Laurent; Dechamp, Jerome, Method of transferring a thin film onto a support.

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93. Fournel, Franck, Method of transferring a thin layer onto a target substrate having a coefficient of thermal expansion different from that of the thin layer.

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94. Sivaram, Srinivasan; Agarwal, Aditya; Herner, S. Brad; Petti, Christopher J., Method to form a photovoltaic cell comprising a thin lamina.

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95. Sivaram, Srinivasan; Agarwal, Aditya; Herner, S. Brad; Petti, Christopher J., Method to form a photovoltaic cell comprising a thin lamina.

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96. Sivaram, Srinivasan; Agarwal, Aditya; Herner, S. Brad; Petti, Christopher J., Method to form a photovoltaic cell comprising a thin lamina.

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97. Sadaka,Mariam G.; Nguyen,Bich Yen; Thean,Voon Yew; White,Ted R., Method to selectively form regions having differing properties and structure.

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98. Maunand Tussot, Corinne; Maleville, Christophe; Moriceau, Hubert; Soubie, Alain, Methods for preparing a bonding surface of a semiconductor wafer.

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99. Huggins, Harold A., Methods of fabricating magnetoresistive memory devices.

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100. Wells, David H., Methods of forming a plurality of covered voids in a semiconductor substrate.

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101. Wells, David H., Methods of forming a span comprising silicon dioxide.

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102. Wells, David H., Methods of forming a span comprising silicon dioxide.

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103. Wells, David H., Methods of forming imager systems.

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104. Wells, David H., Methods of forming nanofluidic channels.

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105. Wells, David H., Methods of forming one or more covered voids in a semiconductor substrate.

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106. Wells, David H., Methods of forming semiconductor-on-insulator substrates, and integrated circuitry.

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107. Wells, David H.; Blomiley, Eric R., Methods of forming transistor devices.

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108. Wells, David H., Methods of forming transistors.

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109. Weng,Xiaojun; Goldman,Rachel S., Narrow energy band gap gallium arsenide nitride semi-conductors and an ion-cut-synthesis method for producing the same.

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110. Malik, Igor J.; Kang, Sien G.; Fuerfanger, Martin; Kirk, Harry; Flat, Ariel; Current, Michael Ira; Ong, Philip James, Non-contact etch annealing of strained layers.

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111. Bryan, Michael A.; Kai, James K., Nozzle for cleaving substrates.

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112. Bryan, Michael A., Particle distribution method and resulting structure for a layer transfer process.

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113. Takayama, Toru; Maruyama, Junya; Yamazaki, Shunpei, Peeling method and method of manufacturing semiconductor device.

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114. Takayama, Toru; Maruyama, Junya; Yamazaki, Shunpei, Peeling method and method of manufacturing semiconductor device.

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115. Takayama, Toru; Maruyama, Junya; Yamazaki, Shunpei, Peeling method and method of manufacturing semiconductor device.

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116. Takayama, Toru; Maruyama, Junya; Yamazaki, Shunpei, Peeling method and method of manufacturing semiconductor device.

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117. Hilali, Mohamed M.; Petti, Christopher J., Photovoltaic cell comprising a thin lamina having low base resistivity and method of making.

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118. Hilali, Mohamed M.; Petti, Christopher J.; Herner, S. Brad, Photovoltaic cell comprising contact regions doped through a lamina.

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119. Adibi, Babak; Chun, Moon, Plasma grid implant system for use in solar cell fabrications.

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120. Norbert Galster CH; Stefan Linder CH, Process for fabricating a semiconductor component.

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121. Moriceau, Hubert; Bruel, Michel; Aspar, Bernard; Maleville, Christophe, Process for the transfer of a thin film.

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122. Moriceau,Hubert; Bruel,Michel; Aspar,Bernard; Maleville,Christophe, Process for the transfer of a thin film.

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123. Moriceau, Hubert; Bruel, Michel; Aspar, Bernard; Maleville, Christophe, Process for the transfer of a thin film comprising an inclusion creation step.

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124. Henley, Francois J.; Brailove, Adam, Race track configuration and method for wafering silicon solar substrates.

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125. Sinha, Nishant; Sandhu, Gurtej S.; Smythe, John, Semiconductor material manufacture.

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126. Wang, Zhongze, Silicon-on-insulator comprising integrated circuitry.

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127. Henley, Francois J.; Cheung, Nathan W., Silicon-on-silicon hybrid wafer assembly.

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128. Bower,Robert W., Smooth thin film layers produced by low temperature hydrogen ion cut.

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129. Adibi, Babak; Murrer, Edward S., Solar cell fabrication with faceting and ion implantation.

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130. Moriceau, Hubert; Aspar, Bernard; Margail, Jacques, Stacked structure and production method thereof.

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131. Henley, Francois; Lamm, Al; Chow, Yi-Lei, Substrate cleaving under controlled stress conditions.

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132. Henley, Francois; Lamm, Al; Chow, Yi-Lei, Substrate cleaving under controlled stress conditions.

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133. Henley, Francois; Lamm, Al; Chow, Yi-Lei, Substrate cleaving under controlled stress conditions.

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134. Pederson, Terry; Hieslmair, Henry; Chun, Moon; Prabhakar, Vinay; Adibi, Babak; Bluck, Terry, Substrate processing system and method.

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135. Pederson, Terry; Hieslmair, Henry; Chun, Moon; Prabhakar, Vinay; Adibi, Babak; Bluck, Terry, Substrate processing system and method.

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136. Brailove, Adam; Liu, Zuqin; Henley, Francois J.; Lamm, Albert J., Techniques for forming thin films by implantation with reduced channeling.

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137. Iwane, Masaaki; Yonehara, Takao, Thin film formation process by clearing the implanted layer with laser radiation.

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138. Tauzin,Aur��lie, Thin film splitting method.

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139. Wang,Zhongze, Wafer bonding method of forming silicon-on-insulator comprising integrated circuitry.

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